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Date:   Mon, 22 May 2017 16:15:37 +0530
From:   Richa Jha <richaj@...c.in>
To:     gregkh@...uxfoundation.org
Cc:     sudipm.mukherjee@...il.com, teddy.wang@...iconmotion.com,
        linux-fbdev@...r.kernel.org, devel@...verdev.osuosl.org,
        linux-kernel@...r.kernel.org, Richa Jha <richaj@...c.in>
Subject: [PATCH] Fixed cameCase check in file  drivers/staging/sm750fb/ddk750_chip.c

Changes :

ulActualMxClk ---> ul_actual_max_clk
p_init_param  ---> pInitParam

Signed-off-by: Richa Jha <richaj@...c.in>
---
 drivers/staging/sm750fb/ddk750_chip.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
index 4f646f2..00bca17 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -55,7 +55,7 @@ static unsigned int get_mxclk_freq(void)
 static void set_chip_clock(unsigned int frequency)
 {
 	struct pll_value pll;
-	unsigned int ul_actual_max_Clk;
+	unsigned int ul_actual_max_clk;
 
 	/* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
 	if (sm750_get_chip_type() == SM750LE)
@@ -75,7 +75,7 @@ static void set_chip_clock(unsigned int frequency)
 		 * Return value of sm750_calc_pll_value gives the actual
 		 * possible clock.
 		 */
-		ul_actual_max_Clk = sm750_calc_pll_value(frequency, &pll);
+		ul_actual_max_clk = sm750_calc_pll_value(frequency, &pll);
 
 		/* Master Clock Control: MXCLK_PLL */
 		poke32(MXCLK_PLL_CTRL, sm750_format_pll_reg(&pll));
-- 
2.1.4


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