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Message-ID: <20170530075739.w3uzqw42lhwblwaw@pd.tnic>
Date: Tue, 30 May 2017 09:57:39 +0200
From: Borislav Petkov <bp@...en8.de>
To: Chris Packham <chris.packham@...iedtelesis.co.nz>
Cc: mchehab@...nel.org, linux-edac@...r.kernel.org, mpe@...erman.id.au,
linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH v3 0/3] EDAC: mv64x60: updates
On Tue, May 30, 2017 at 09:21:39AM +1200, Chris Packham wrote:
> I'm looking at making use of the mv64x60_edac driver for the armada processors.
> It appears that at least the DRAM ECC error reporting is the same block from
> the old Marvell Discovery class of processors. On the ARM side I need to get
> the error interrupts exposed first before I can send my second set of changes
> for this driver but this first set is just a series of cleanups.
>
> Chris Packham (3):
> EDAC: mv64x60: check driver registration success
> EDAC: mv64x60: Fix pdata->name
> EDAC: mv64x60: replace in_le32/out_le32 with readl/writel
>
> drivers/edac/mv64x60_edac.c | 94 +++++++++++++++++++++++----------------------
> 1 file changed, 49 insertions(+), 45 deletions(-)
All 3 applied, thanks.
--
Regards/Gruss,
Boris.
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