lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 1 Jun 2017 11:10:27 +0100
From:   John Garry <john.garry@...wei.com>
To:     Christoph Hellwig <hch@...radead.org>
CC:     <jejb@...ux.vnet.ibm.com>, <martin.petersen@...cle.com>,
        <john.garry2@...l.dcu.ie>, <linuxarm@...wei.com>,
        <linux-scsi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <arnd@...db.de>, Xiang Chen <chenxiang66@...ilicon.com>
Subject: Re: [PATCH v3 13/23] scsi: hisi_sas: add phy up/down/bcast and
 channel ISR

On 01/06/2017 06:41, Christoph Hellwig wrote:
>> > +static int interrupt_init_v3_hw(struct hisi_hba *hisi_hba)
>> > +{
>> > +	struct device *dev = hisi_hba->dev;
>> > +	struct pci_dev *pdev = hisi_hba->pci_dev;
>> > +	int vectors, i, irq, rc;
>> > +	int max_msi = HISI_SAS_MSI_COUNT_V3_HW;
>> > +	int msi_vectors[HISI_SAS_MSI_COUNT_V3_HW];
>> > +
>> > +	if (pdev->msi_enabled)
>> > +		pci_disable_msi(pdev);
> How could MSIs be enabled at init time?  Even if so you should use
> pci_free_irq_vectors.

Right, I don't think it could, so this can be removed.

>
>> > +	for (i = 0; i < vectors; i++)
>> > +		msi_vectors[i] = pdev->irq + i;
> You should not need this array, just use pci_irq_vectors().
>

That should be ok.

> .
>

Thanks,
John

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ