linux-kernel - Re: [PATCH v2 1/6] dt-bindings: interrupt-controller: add DT binding for the Marvell GICP

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Date:   Thu, 8 Jun 2017 13:07:59 +0100
From:   Marc Zyngier <marc.zyngier@....com>
To:     Rob Herring <robh@...nel.org>,
        Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        Ian Campbell <ijc+devicetree@...lion.org.uk>,
        Pawel Moll <pawel.moll@....com>,
        Mark Rutland <mark.rutland@....com>,
        Kumar Gala <galak@...eaurora.org>,
        Andrew Lunn <andrew@...n.ch>,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        Gregory Clement <gregory.clement@...e-electrons.com>,
        Nadav Haklai <nadavh@...vell.com>,
        Hanna Hawa <hannah@...vell.com>,
        Yehuda Yitschak <yehuday@...vell.com>,
        Antoine Tenart <antoine.tenart@...e-electrons.com>,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 1/6] dt-bindings: interrupt-controller: add DT binding
 for the Marvell GICP

On 07/06/17 23:24, Rob Herring wrote:
> On Fri, Jun 02, 2017 at 12:06:52PM +0200, Thomas Petazzoni wrote:
>> This commit adds the Device Tree binding documentation for the Marvell
>> GICP, an extension to the GIC that allows to trigger GIC SPI interrupts
>> using memory transactions. It is used by the ICU unit in the Marvell
>> CP110 block to turn wired interrupts inside the CP into SPI interrupts
>> at the GIC level in the AP.
> 
> Sounds like an MSI block?

Almost. It also allows to deal with level interrupts, which a classic
MSI controller cannot manage. This looks like it has been lifted from
the GICv3 spec, which offers the exact same mechanism for SPIs.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...