linux-kernel - Re: [PATCH 1/4] drm: bridge: dw-hdmi: Export hdmi_phy_configure_dwc_hdmi_3d

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Message-ID: <054c9712-9548-dc1a-b22c-11961c1c81e4@synopsys.com>
Date:   Fri, 9 Jun 2017 09:37:24 +0100
From:   Jose Abreu <Jose.Abreu@...opsys.com>
To:     Mark yao <mark.yao@...k-chips.com>
CC:     Archit Taneja <architt@...eaurora.org>,
        David Airlie <airlied@...ux.ie>,
        Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>,
        Jose Abreu <Jose.Abreu@...opsys.com>,
        Neil Armstrong <narmstrong@...libre.com>,
        "Daniel Vetter" <daniel.vetter@...ll.ch>,
        Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
        <dri-devel@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/4] drm: bridge: dw-hdmi: Export
 hdmi_phy_configure_dwc_hdmi_3d_tx

Hi Mark,


On 09-06-2017 05:03, Mark yao wrote:
> Ignore this patch, Jose has a better patch to solve rk3399 hdmi
> phy configure.
>
> Hi Jose
>
> Sorry for missing your patch about hdmi 2.0 vendor phy fixup:
> https://urldefense.proofpoint.com/v2/url?u=https-3A__patchwork.kernel.org_patch_9702229&d=DwIDaQ&c=DPL6_X_6JkXFx7AXWqB0tg&r=WHDsc6kcWAl4i96Vm5hJ_19IJiuxx_p_Rzo2g-uHDKw&m=8R_vb_WsWrT4y-nLrSn1RBR3e11-CkyKvht1NtJ2ZgM&s=ajY_TW_nm7T6pUv_I9ZZctUjTaEEDe9BnF-mnlvxEEs&e=
> It works fine on rk3399/rk3288, can you resend a standard patch
> to upstream?

Sure. I forgot to send this earlier. I will send it today.

Best regards,
Jose Miguel Abreu

>
> Thanks
>
> On 2017年06月09日 10:45, Mark Yao wrote:
>> So dw-hdmi vendor driver can reuse
>> hdmi_phy_configure_dwc_hdmi_3d_tx
>> to configure their hardware.
>>
>> Signed-off-by: Mark Yao <mark.yao@...k-chips.com>
>> ---
>>   drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 3 ++-
>>   include/drm/bridge/dw_hdmi.h              | 3 +++
>>   2 files changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
>> b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
>> index 4e1f54a..c1ceec7 100644
>> --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
>> +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
>> @@ -1097,7 +1097,7 @@ static int dw_hdmi_phy_power_on(struct
>> dw_hdmi *hdmi)
>>    * information the DWC MHL PHY has the same register layout
>> and is thus also
>>    * supported by this function.
>>    */
>> -static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi
>> *hdmi,
>> +int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
>>           const struct dw_hdmi_plat_data *pdata,
>>           unsigned long mpixelclock)
>>   {
>> @@ -1146,6 +1146,7 @@ static int
>> hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
>>         return 0;
>>   }
>> +EXPORT_SYMBOL_GPL(hdmi_phy_configure_dwc_hdmi_3d_tx);
>>     static int hdmi_phy_configure(struct dw_hdmi *hdmi)
>>   {
>> diff --git a/include/drm/bridge/dw_hdmi.h
>> b/include/drm/bridge/dw_hdmi.h
>> index ed599be..7eb67e6 100644
>> --- a/include/drm/bridge/dw_hdmi.h
>> +++ b/include/drm/bridge/dw_hdmi.h
>> @@ -150,6 +150,9 @@ int dw_hdmi_probe(struct platform_device
>> *pdev,
>>   int dw_hdmi_bind(struct platform_device *pdev, struct
>> drm_encoder *encoder,
>>            const struct dw_hdmi_plat_data *plat_data);
>>   +int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
>> +        const struct dw_hdmi_plat_data *pdata,
>> +        unsigned long mpixelclock);
>>   void dw_hdmi_setup_rx_sense(struct device *dev, bool hpd,
>> bool rx_sense);
>>     void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi,
>> unsigned int rate);
>
>