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Message-Id: <20170623090348.31856-1-marc.zyngier@arm.com>
Date:   Fri, 23 Jun 2017 10:03:48 +0100
From:   Marc Zyngier <marc.zyngier@....com>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     Andrew Jeffery <andrew@...id.au>,
        Arvind Yadav <arvind.yadav.cs@...il.com>,
        Brendan Higgins <brendanhiggins@...gle.com>,
        Chen-Yu Tsai <wens@...e.org>,
        Ganapatrao Kulkarni <ganapatrao.kulkarni@...ium.com>,
        Gregory CLEMENT <gregory.clement@...e-electrons.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        MaJun <majun258@...wei.com>, Rob Herring <robh@...nel.org>,
        Robin Murphy <robin.murphy@....com>,
        Shanker Donthineni <shankerd@...eaurora.org>,
        Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
        Tobias Klauser <tklauser@...tanz.ch>,
        Wei Yongjun <weiyongjun1@...wei.com>,
        Jason Cooper <jason@...edaemon.net>,
        linux-kernel@...r.kernel.org
Subject: [GIT PULL] irqchip updates for v4.13

Hi Thomas,

This is the pull request for the 4.13 irqchip updates. Noticeable
additions this time around are the Marvell ICU (a wire to MSI bridge)
and the Aspeed I2C irqchip. The rest is a mix of driver updates and
cleanups.

Please pull,

	M.

The following changes since commit 3c2993b8c6143d8a5793746a54eba8f86f95240f:

  Linux 4.12-rc4 (2017-06-04 16:47:43 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git tags/irqchip-4.13

for you to fetch changes up to 6c31e123dc4c59eeaae6ac1cd08b929e8b6f7651:

  irqchip/gic-v3-its: Don't assume GICv3 hardware supports 16bit INTID (2017-06-23 09:14:59 +0100)

----------------------------------------------------------------
irqchip updates for v4.13

- support for the new Marvell wire-to-MSI bridge
- support for the Aspeed I2C irqchip
- Armada XP370 per-cpu interrupt fixes
- GICv3 ITS ACPI NUMA support
- sunxi-nmi cleanup and updates for new platform support
- various GICv3 ITS cleanups and fixes
- some constifying in various places

----------------------------------------------------------------
Andrew Jeffery (1):
      irqchip/aspeed-vic: Add AST2500 compatible string

Arvind Yadav (2):
      irqchip/gic-v3-its: Make of_device_ids const
      irqchip/gic-v3-its-platform-msi: Make of_device_ids const

Brendan Higgins (2):
      irqchip/aspeed-i2c-ic: Add binding docs for Aspeed I2C Interrupt Controller
      irqchip/aspeed-i2c-ic: Add I2C IRQ controller for Aspeed

Chen-Yu Tsai (6):
      irqchip/sunxi-nmi: Convert magic numbers to defines
      irqchip/sunxi-nmi: Document interrupt disabling and clearing at probe time
      irqchip/sunxi-nmi: Reorder sunxi_sc_nmi_reg_offs' in ascending order
      irqchip/sunxi-nmi: Const-ify sunxi_sc_nmi_reg_offs structures
      dt-bindings/interrupt-controller: sunxi-nmi: Add compatible for A31 R_INTC
      irqchip/sunxi-nmi: Support sun6i-a31-r-intc compatible

Ganapatrao Kulkarni (1):
      irqchip/gic-v3-its: Add ACPI NUMA node mapping

MaJun (1):
      irqchip/gicv3-its: Skip irq affinity setting when target cpu is the same as current setting

Robin Murphy (1):
      irqchip/gic-v3-its: Fix MSI alias accounting

Shanker Donthineni (1):
      irqchip/gic-v3-its: Don't assume GICv3 hardware supports 16bit INTID

Thomas Petazzoni (8):
      irqchip/armada-370-xp: Re-order register definitions
      irqchip/armada-370-xp: Document the overall driver logic
      irqchip/armada-370-xp: Re-enable per-CPU interrupts at resume time
      Revert "irqchip/armada-370-xp: Fix regression by clearing IRQ_NOAUTOEN"
      dt-bindings/interrupt-controller: Add DT binding for the Marvell GICP
      dt-bindings/interrupt-controller: Add DT binding for the Marvell ICU
      irqchip/irq-mvebu-gicp: Add new driver for Marvell GICP
      irqchip/irq-mvebu-icu: Add new driver for Marvell ICU

Tobias Klauser (7):
      irqchip/i8259: Constify irq_domain_ops
      irqchip/irq-imx-gpcv2: Constify irq_domain_ops
      irqchip/irq-mbigen: Constify irq_domain_ops
      irqchip/irq-mips-gic: Constify irq_domain_ops
      irqchip/irq-renesas-h8300h: Constify irq_domain_ops
      irqchip/irq-renesas-h8s: Constify irq_domain_ops
      irqchip/aspeed-vic: Constify irq_domain_ops

Wei Yongjun (1):
      irqchip/qcom: Use builtin_platform_driver to simplify the code

 .../interrupt-controller/allwinner,sunxi-nmi.txt   |   7 +-
 .../interrupt-controller/aspeed,ast2400-i2c-ic.txt |  25 ++
 .../interrupt-controller/aspeed,ast2400-vic.txt    |   9 +-
 .../bindings/interrupt-controller/marvell,gicp.txt |  27 ++
 .../bindings/interrupt-controller/marvell,icu.txt  |  51 ++++
 drivers/irqchip/Kconfig                            |   6 +
 drivers/irqchip/Makefile                           |   4 +-
 drivers/irqchip/irq-armada-370-xp.c                | 146 +++++++++--
 drivers/irqchip/irq-aspeed-i2c-ic.c                | 115 ++++++++
 drivers/irqchip/irq-aspeed-vic.c                   |   5 +-
 drivers/irqchip/irq-gic-v3-its-pci-msi.c           |  35 ++-
 drivers/irqchip/irq-gic-v3-its-platform-msi.c      |   2 +-
 drivers/irqchip/irq-gic-v3-its.c                   | 111 ++++++--
 drivers/irqchip/irq-i8259.c                        |   2 +-
 drivers/irqchip/irq-imx-gpcv2.c                    |   2 +-
 drivers/irqchip/irq-mbigen.c                       |   2 +-
 drivers/irqchip/irq-mips-gic.c                     |   2 +-
 drivers/irqchip/irq-mvebu-gicp.c                   | 279 ++++++++++++++++++++
 drivers/irqchip/irq-mvebu-gicp.h                   |  11 +
 drivers/irqchip/irq-mvebu-icu.c                    | 289 +++++++++++++++++++++
 drivers/irqchip/irq-renesas-h8300h.c               |   2 +-
 drivers/irqchip/irq-renesas-h8s.c                  |   2 +-
 drivers/irqchip/irq-sunxi-nmi.c                    |  68 ++++-
 drivers/irqchip/qcom-irq-combiner.c                |   7 +-
 .../dt-bindings/interrupt-controller/mvebu-icu.h   |  15 ++
 25 files changed, 1134 insertions(+), 90 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,gicp.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt
 create mode 100644 drivers/irqchip/irq-aspeed-i2c-ic.c
 create mode 100644 drivers/irqchip/irq-mvebu-gicp.c
 create mode 100644 drivers/irqchip/irq-mvebu-gicp.h
 create mode 100644 drivers/irqchip/irq-mvebu-icu.c
 create mode 100644 include/dt-bindings/interrupt-controller/mvebu-icu.h

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