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Message-ID: <9449e968-bddb-2b34-3ede-b786238b6421@linaro.org>
Date: Fri, 23 Jun 2017 12:03:50 +0100
From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To: Stephen Boyd <sboyd@...eaurora.org>
Cc: linux-clk@...r.kernel.org, Andy Gross <andy.gross@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: gcc-msm8996: Add missing lpass smmu clks
On 20/06/17 01:47, Stephen Boyd wrote:
> On 06/12, Srinivas Kandagatla wrote:
>> This patch adds missing LPASS smmu clks which are required by the audio driver.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
>> ---
>> drivers/clk/qcom/gcc-msm8996.c | 26 ++++++++++++++++++++++++++
>> include/dt-bindings/clock/qcom,gcc-msm8996.h | 2 ++
>> 2 files changed, 28 insertions(+)
>>
>> diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
>> index 56e0a295c74e..6290ce551505 100644
>> --- a/drivers/clk/qcom/gcc-msm8996.c
>> +++ b/drivers/clk/qcom/gcc-msm8996.c
>> @@ -2644,6 +2644,30 @@ static struct clk_fixed_factor ufs_rx_cfg_clk_src = {
>> },
>> };
>>
>> +static struct clk_branch gcc_hlos1_vote_lpass_core_smmu_clk = {
>> + .halt_reg = 0x7d010,
>
> Don't we need .halt_check = BRANCH_HALT_VOTED for these?
>
I don't think we need it for these clks, Downstream driver has
no_halt_check_on_disable = true for both these clks.
thanks,
srini
>> + .clkr = {
>> + .enable_reg = 0x7d010,
>> + .enable_mask = BIT(0),
>> + .hw.init = &(struct clk_init_data){
>> + .name = "hlos1_vote_lpass_core_smmu_clk",
>> + .ops = &clk_branch2_ops,
>> + },
>> + },
>> +};
>> +
>> +static struct clk_branch gcc_hlos1_vote_lpass_adsp_smmu_clk = {
>> + .halt_reg = 0x7d014,
>> + .clkr = {
>> + .enable_reg = 0x7d014,
>> + .enable_mask = BIT(0),
>> + .hw.init = &(struct clk_init_data){
>> + .name = "hlos1_vote_lpass_adsp_smmu_clk",
>> + .ops = &clk_branch2_ops,
>> + },
>> + },
>> +};
>> +
>
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