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Message-ID: <CAOMZO5BeovjoheauMXJigKjPRCcf3H6hz73duwGPVCKS3qY6vw@mail.gmail.com>
Date: Sun, 2 Jul 2017 10:43:06 -0300
From: Fabio Estevam <festevam@...il.com>
To: Romain Perier <romain.perier@...labora.com>
Cc: Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <kernel@...gutronix.de>,
Fabio Estevam <fabio.estevam@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Kumar Gala <galak@...eaurora.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Martyn Welch <martyn.welch@...labora.co.uk>
Subject: Re: [PATCH] ARM: dts: imx: Correct B850v3 clock assignment
On Fri, Jun 30, 2017 at 10:43 AM, Romain Perier
<romain.perier@...labora.com> wrote:
> From: Martyn Welch <martyn.welch@...labora.co.uk>
>
> The IPU that drives HDMI must have its pre_sel set to pll2_pfd_396m
> to avoid stepping on the LVDS output's toes, as the PLL can't be clocked
> to the pixel clock and to the LVDS serial clock (3.5*pixel clock) at the
> same time.
>
> As we are using ipu1_di0 and ipu2_di0, ensure both are switched to
> to pll2_pfd2_396m to avoid issues. The LDB driver will switch the
> required IPU to ldb_di1 when it uses it to drive LVDS.
>
> Signed-off-by: Martyn Welch <martyn.welch@...labora.co.uk>
> Signed-off-by: Romain Perier <romain.perier@...labora.com>
Reviewed-by: Fabio Estevam <fabio.estevam@....com>
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