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Message-ID: <20170706205030.e6wzn5n7ix3443cl@flea>
Date:   Thu, 6 Jul 2017 22:50:30 +0200
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     Icenowy Zheng <icenowy@...c.io>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Chen-Yu Tsai <wens@...e.org>,
        linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com
Subject: Re: [PATCH 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl
 driver

On Thu, Jul 06, 2017 at 10:28:22PM +0800, Icenowy Zheng wrote:
>  	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
>  		  SUNXI_FUNCTION(0x0, "gpio_in"),
>  		  SUNXI_FUNCTION(0x1, "gpio_out"),
> -		  SUNXI_FUNCTION(0x2, "i2c0")),		/* SCK */
> +		  SUNXI_FUNCTION(0x2, "i2c0"),		/* SCK */
> +		  SUNXI_FUNCTION_VARIANT(0x3,
> +					 "pll_lock_dbg",
> +					 PINCTRL_SUN8I_R40)),

You have a number of lines where the wrapping is not consistent with
the rest, such as this one, but also...

>  	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
>  		  SUNXI_FUNCTION(0x0, "gpio_in"),
>  		  SUNXI_FUNCTION(0x1, "gpio_out"),
> -		  SUNXI_FUNCTION(0x2, "i2c2")),		/* SCK */
> +		  SUNXI_FUNCTION(0x2, "i2c2"),		/* SCK */
> +		  SUNXI_FUNCTION_VARIANT(0x4,
> +					 "pwm",		/* PWM4 */
> +					 PINCTRL_SUN8I_R40)),

... this one for example. Please fix this.

Looks good otherwise.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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