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Message-ID: <20170725145903.GA20857@leverpostej>
Date: Tue, 25 Jul 2017 15:59:04 +0100
From: Mark Rutland <mark.rutland@....com>
To: Dave Martin <Dave.Martin@....com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-arch@...r.kernel.org,
arnd@...db.de, jiong.wang@....com, marc.zyngier@....com,
catalin.marinas@....com, suzuki.poulose@....com,
will.deacon@....com, linux-kernel@...r.kernel.org,
kvmarm@...ts.cs.columbia.edu, christoffer.dall@...aro.org
Subject: Re: [RFC 7/9] arm64: expose PAC bit positions via ptrace
On Tue, Jul 25, 2017 at 01:11:48PM +0100, Dave Martin wrote:
> On Mon, Apr 03, 2017 at 04:19:23PM +0100, Mark Rutland wrote:
> > +/*
> > + * The pointer bits used by a pointer authentication code.
> > + * If we were to use tagged pointers, bits 63:56 would also apply.
> > + */
> > +#define ptrauth_pac_mask() GENMASK(54, VA_BITS)
>
> Tagged pointers _are_ enabled for userspace by default, no?
Yes; I'd meant s/tagged/untagged/.
I've corrected this to:
/*
* The EL0 pointer bits used by a pointer authentication code.
* This is dependent on TBI0 being enabled, or bits 63:56 would also apply.
*/
> > diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
> > index b59ee07..cae3d1e 100644
> > --- a/include/uapi/linux/elf.h
> > +++ b/include/uapi/linux/elf.h
> > @@ -414,6 +414,7 @@
> > #define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */
> > #define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */
> > #define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */
> > +#define NT_ARM_PAC_MASK 0x405 /* ARM pointer authentication code masks */
>
> The is the value tentatively assigned to NT_ARM_SVE.
I must've generated this patch before I corrected this; my local branch
(and kernel.org) have 0x406 here.
Sorry about that.
Mark.
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