linux-kernel - Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

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Message-ID: <20170726153502.GE28875@nazgul.tnic>
Date:   Wed, 26 Jul 2017 17:35:02 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Jan Glauber <jan.glauber@...iumnetworks.com>
Cc:     Suzuki K Poulose <Suzuki.Poulose@....com>,
        Mark Rutland <mark.rutland@....com>,
        Will Deacon <will.deacon@....com>,
        linux-arm-kernel@...ts.infradead.org,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU
 counters

On Wed, Jul 26, 2017 at 05:13:14PM +0200, Jan Glauber wrote:
> I'm also looking for CPU implementor (MIDR), I could check for the model
> too but I still need to detect devices based on PCI IDs as the model
> check is not sufficient here (only multi-socket ThunderX has OCX TLK
> devices).

So what does that mean? The only way to load a PMU driver and an EDAC
driver is the PCI ID of the memory controller? No other way?

-- 
Regards/Gruss,
    Boris.

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