lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20170728183428.GH2146@codeaurora.org>
Date:   Fri, 28 Jul 2017 11:34:28 -0700
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Abhishek Sahu <absahu@...eaurora.org>
Cc:     mturquette@...libre.com, andy.gross@...aro.org,
        david.brown@...aro.org, rnayak@...eaurora.org,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [RFC 06/12] Clk: qcom: support for dynamic updating the PLL

On 07/27, Abhishek Sahu wrote:
> Some of the Alpha PLL’s support dynamic update in which the
> frequency can be changed dynamically without turning off the PLL.
> 
> This dynamic update requires the following sequence
> 
> 1. Write the desired values to pll_l_val and pll_alpha_val.
> 2. Toggle pll_latch_input from low to high.
> 3. Wait for pll_ack_latch to transition from low to high.
>    The new L and alpha values have been latched. It make
>    take some time for the PLL to fully settle with these
>    new values.
> 4. Pull pll_latch_input low.
> 
> Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>

I think Rajendra has a similar patch that was sent. Is this the
same? Can you please look on the list and find it and compare?

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ