linux-kernel - Re: [PATCH v7 04/15] irqchip: RISC-V Local Interrupt Controller Driver

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Message-ID: <CABGGiswwVh46_5JgrXzb_w=jdbr5v6tQJMRCkeZQ8joNOefEdg@mail.gmail.com>
Date:   Tue, 1 Aug 2017 12:08:14 -0500
From:   Rob Herring <robh@...nel.org>
To:     Palmer Dabbelt <palmer@...belt.com>
Cc:     peterz@...radead.org, tglx@...utronix.de, jason@...edaemon.net,
        Marc Zyngier <marc.zyngier@....com>,
        Arnd Bergmann <arnd@...db.de>, yamada.masahiro@...ionext.com,
        mmarek@...e.com, albert@...ive.com,
        Will Deacon <will.deacon@....com>, boqun.feng@...il.com,
        oleg@...hat.com, mingo@...hat.com,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        jslaby@...e.com, davem@...emloft.net, mchehab@...nel.org,
        hverkuil@...all.nl, rdunlap@...radead.org, viro@...iv.linux.org.uk,
        mhiramat@...nel.org, fweisbec@...il.com, mcgrof@...nel.org,
        dledford@...hat.com, bart.vanassche@...disk.com,
        sstabellini@...nel.org, mpe@...erman.id.au,
        rmk+kernel@...linux.org.uk, paul.gortmaker@...driver.com,
        nicolas.dichtel@...nd.com, linux@...ck-us.net,
        heiko.carstens@...ibm.com, schwidefsky@...ibm.com,
        geert@...ux-m68k.org, Andrew Morton <akpm@...ux-foundation.org>,
        andriy.shevchenko@...ux.intel.com, jiri@...lanox.com,
        vgupta@...opsys.com, airlied@...hat.com, jk@...abs.org,
        chris@...is-wilson.co.uk, Jason@...c4.com,
        Paul McKenney <paulmck@...ux.vnet.ibm.com>,
        ncardwell@...gle.com,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-kbuild@...r.kernel.org, patches@...ups.riscv.org
Subject: Re: [PATCH v7 04/15] irqchip: RISC-V Local Interrupt Controller Driver

On Mon, Jul 31, 2017 at 7:59 PM, Palmer Dabbelt <palmer@...belt.com> wrote:
> This patch adds a driver that manages the local interrupts on each
> RISC-V hart, as specifiec by the RISC-V supervisor level ISA manual.
> The local interrupt controller manages software interrupts, timer
> interrupts, and hardware interrupts (which are routed via the
> platform level interrupt controller).  Per-hart local interrupt
> controllers are found on all RISC-V systems.
>
> Signed-off-by: Palmer Dabbelt <palmer@...belt.com>
> ---


> +IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init);

What happened with the DT bindings? Those need to come first.

Rob