linux-kernel - Re: [PATCH resend 1/2] mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT

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Message-ID: <20170905073918.b735npja5cp7pejj@dell>
Date:   Tue, 5 Sep 2017 08:39:18 +0100
From:   Lee Jones <lee.jones@...aro.org>
To:     Hans de Goede <hdegoede@...hat.com>
Cc:     linux-kernel@...r.kernel.org
Subject: Re: [PATCH resend 1/2] mfd: intel_soc_pmic: Export separate mfd-cell
 configs for BYT and CHT

On Mon, 04 Sep 2017, Hans de Goede wrote:

> Both Bay and Cherry Trail devices may be used together with a Crystal Cove
> PMIC. Each platform has its own variant of the PMIC, which both use the
> same ACPI HID, but they are not 100% compatible.
> 
> Looking at the android x86 kernel sources where most of the Crystal Cove
> code comes from, it talks about "Valley View", "Bay Trail" and / or BYT
> without ever mentioning Cherry Trail, with the exception of the regulator
> driver. The Asus Zenfone-2 kernel code has 2 regulator drivers, one
> for Crystal Cove and one for what it calls Crystal Cove Plus. The
> Crystal Cove Plus regulator driver is the only one to mention Cherry
> Trail and that driver uses different register addresses then the
> normal (Bay Trail) Crystal Cove regulator driver, showing that at
> least the regulator register addresses are different.
> 
> The GPIO code should work on both, and the PWM code is known to work on
> both and is necessary for backlight control on some Cherry Trail devices.
> 
> Testing has shown that the ACPI OpRegion code otoh is causing problems
> on Cherry Trail devices, which is not surprising as it deals with the
> regulators and those have different register addresses on CHT.
> 
> Specifically the ACPI OpRegion code causes the external microsd slot on
> a Dell Venue 8 5855 (Cherry Trail version) to not work and the eMMC to
> become unreliable and throw lots of errors.
> 
> This commit replaces the single mfd_cell array currently used for Crystal
> Cove with 2 separate arrays, one for the Bay Trail variant and one for
> the Cherry Trail variant, note that the Cherry Trail version of the array
> only contains gpio and pwm cells. The PMIC OpRegion cell is deliberately
> not included and drivers for the other cells in the Bay Trail cell array
> were never upstreamed.
> 
> Fixes: 7cf0a66f32 ("mfd: intel_soc_pmic: Crystal Cove support")
> Reported-and-tested-by: russianneuromancer <russianneuromancer@...ru>
> Signed-off-by: Hans de Goede <hdegoede@...hat.com>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@...il.com>
> Acked-for-MFD-by: Lee Jones <lee.jones@...aro.org>
> ---
>  drivers/mfd/intel_soc_pmic_core.c |  2 +-
>  drivers/mfd/intel_soc_pmic_core.h |  3 ++-
>  drivers/mfd/intel_soc_pmic_crc.c  | 27 +++++++++++++++++++++++----
>  3 files changed, 26 insertions(+), 6 deletions(-)

Applied, thanks.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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