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Date: Wed, 6 Sep 2017 16:06:39 +0530 From: Keerthy <j-keerthy@...com> To: <sboyd@...eaurora.org>, <t-kristo@...com> CC: <linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>, <linux-omap@...r.kernel.org>, <tony@...mide.com>, <j-keerthy@...com> Subject: [PATCH] clk: ti: dra7xx: Reset the mcasp3_ahclkx_mux clock value Reset the mcasp3_ahclkx_mux to abe_24m_fclk. This is needed in case of kexec where the reset values might be wiped off. Signed-off-by: Keerthy <j-keerthy@...com> --- drivers/clk/ti/clk-7xx.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c index 9fd6043..2c3a36c 100644 --- a/drivers/clk/ti/clk-7xx.c +++ b/drivers/clk/ti/clk-7xx.c @@ -312,7 +312,7 @@ int __init dra7xx_dt_clk_init(void) { int rc; - struct clk *dpll_ck, *hdcp_ck; + struct clk *dpll_ck, *hdcp_ck, *mcasp3_ahclkx_ck, *abe_ck; ti_dt_clocks_register(dra7xx_clks); @@ -338,5 +338,12 @@ int __init dra7xx_dt_clk_init(void) if (rc) pr_err("%s: failed to set dss_deshdcp_clk\n", __func__); + mcasp3_ahclkx_ck = clk_get_sys(NULL, "mcasp3_ahclkx_mux"); + abe_ck = clk_get_sys(NULL, "abe_24m_fclk"); + rc = clk_set_parent(mcasp3_ahclkx_ck, abe_ck); + if (rc) + pr_err("%s: failed to set parent for mcasp3_ahclkx_mux\n", + __func__); + return rc; } -- 1.9.1
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