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Message-Id: <20170913145249.f89678a57842da122aa062fd@linux-foundation.org>
Date: Wed, 13 Sep 2017 14:52:49 -0700
From: Andrew Morton <akpm@...ux-foundation.org>
To: Huacai Chen <chenhc@...ote.com>
Cc: Fuxin Zhang <zhangfx@...ote.com>, linux-mm@...ck.org,
linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in
non-coherent DMA mode
On Wed, 13 Sep 2017 17:20:51 +0800 Huacai Chen <chenhc@...ote.com> wrote:
> In non-coherent DMA mode, kernel uses cache flushing operations to
> maintain I/O coherency, so the dmapool objects should be aligned to
> ARCH_DMA_MINALIGN.
What are the user-visible effects of this bug?
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