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Message-ID: <20170918075837.quzrgygzzpdsooh2@flea.lan>
Date: Mon, 18 Sep 2017 09:58:37 +0200
From: Maxime Ripard <maxime.ripard@...e-electrons.com>
To: Stefan Brüns <stefan.bruens@...h-aachen.de>
Cc: linux-sunxi@...glegroups.com, devicetree@...r.kernel.org,
dmaengine@...r.kernel.org, Vinod Koul <vinod.koul@...el.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Chen-Yu Tsai <wens@...e.org>, Rob Herring <robh+dt@...nel.org>,
Code Kipper <codekipper@...il.com>,
Andre Przywara <andre.przywara@....com>
Subject: Re: [PATCH v2 02/10] dmaengine: sun6i: Correct burst length field
offsets for H3
On Sun, Sep 17, 2017 at 05:19:48AM +0200, Stefan Brüns wrote:
> For the H3, the burst lengths field offsets in the channel configuration
> register differs from earlier SoC generations.
>
> Using the A31 register macros actually configured the H3 controller
> do to bursts of length 1 always, which although working leads to higher
> bus utilisation.
>
> Signed-off-by: Stefan Brüns <stefan.bruens@...h-aachen.de>
Acked-by: Maxime Ripard <maxime.ripard@...e-electrons.com>
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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