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Message-ID: <tip-9514ececa52e9f1436e7682e98c852d1338b699f@git.kernel.org>
Date: Mon, 16 Oct 2017 14:16:20 -0700
From: "tip-bot for mike.travis@....com" <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: hpa@...or.com, tglx@...utronix.de, andrew.banman@....com,
russ.anderson@....com, prarit@...hat.com, dimitri.sivanich@....com,
peterz@...radead.org, bin.gao@...ux.intel.com, mike.travis@....com,
linux-kernel@...r.kernel.org, mingo@...nel.org
Subject: [tip:x86/timers] x86/tsc: Skip TSC test and error messages if
already unstable
Commit-ID: 9514ececa52e9f1436e7682e98c852d1338b699f
Gitweb: https://git.kernel.org/tip/9514ececa52e9f1436e7682e98c852d1338b699f
Author: mike.travis@....com <mike.travis@....com>
AuthorDate: Thu, 12 Oct 2017 11:32:03 -0500
Committer: Thomas Gleixner <tglx@...utronix.de>
CommitDate: Mon, 16 Oct 2017 22:50:36 +0200
x86/tsc: Skip TSC test and error messages if already unstable
If the TSC has already been determined to be unstable, then checking
TSC ADJUST values is a waste of time and generates unnecessary error
messages.
Signed-off-by: Mike Travis <mike.travis@....com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Reviewed-by: Dimitri Sivanich <dimitri.sivanich@....com>
Reviewed-by: Russ Anderson <russ.anderson@....com>
Reviewed-by: Peter Zijlstra <peterz@...radead.org>
Cc: Prarit Bhargava <prarit@...hat.com>
Cc: Andrew Banman <andrew.banman@....com>
Cc: Bin Gao <bin.gao@...ux.intel.com>
Link: https://lkml.kernel.org/r/20171012163202.060777495@stormcage.americas.sgi.com
---
arch/x86/kernel/tsc_sync.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index 3873dcd..3bdb983 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -52,6 +52,10 @@ void tsc_verify_tsc_adjust(bool resume)
if (!boot_cpu_has(X86_FEATURE_TSC_ADJUST))
return;
+ /* Skip unnecessary error messages if TSC already unstable */
+ if (check_tsc_unstable())
+ return;
+
/* Rate limit the MSR check */
if (!resume && time_before(jiffies, adj->nextcheck))
return;
@@ -114,6 +118,10 @@ bool __init tsc_store_and_check_tsc_adjust(bool bootcpu)
if (!boot_cpu_has(X86_FEATURE_TSC_ADJUST))
return false;
+ /* Skip unnecessary error messages if TSC already unstable */
+ if (check_tsc_unstable())
+ return false;
+
rdmsrl(MSR_IA32_TSC_ADJUST, bootval);
cur->bootval = bootval;
cur->nextcheck = jiffies + HZ;
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