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Message-ID: <20171019151008.GC24204@lst.de>
Date:   Thu, 19 Oct 2017 17:10:08 +0200
From:   Christoph Hellwig <hch@....de>
To:     Huacai Chen <chenhc@...ote.com>
Cc:     Christoph Hellwig <hch@....de>,
        Marek Szyprowski <m.szyprowski@...sung.com>,
        Robin Murphy <robin.murphy@....com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Fuxin Zhang <zhangfx@...ote.com>, linux-kernel@...r.kernel.org,
        Ralf Baechle <ralf@...ux-mips.org>,
        James Hogan <james.hogan@...tec.com>,
        linux-mips@...ux-mips.org,
        "James E . J . Bottomley" <jejb@...ux.vnet.ibm.com>,
        "Martin K . Petersen" <martin.petersen@...cle.com>,
        linux-scsi@...r.kernel.org, Tejun Heo <tj@...nel.org>,
        linux-ide@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH V8 3/5] scsi: Align block queue to
        dma_get_cache_alignment()

On Tue, Oct 17, 2017 at 04:05:40PM +0800, Huacai Chen wrote:
> In non-coherent DMA mode, kernel uses cache flushing operations to
> maintain I/O coherency, so scsi's block queue should be aligned to
> ARCH_DMA_MINALIGN. Otherwise, If a DMA buffer and a kernel structure
> share a same cache line, and if the kernel structure has dirty data,
> cache_invalidate (no writeback) will cause data corruption.

Looks fine to, and I like cleaning up the arcane 0x03 as wel.

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