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Message-ID: <CAGb2v64T=z8RefyEcDHJyrJE9ZCRN=c6zVf25JEqSKvDGUE_Rg@mail.gmail.com>
Date:   Fri, 20 Oct 2017 00:34:30 +0800
From:   Chen-Yu Tsai <wens@...e.org>
To:     Joonas Kylmälä <joonas.kylmala@....fi>
Cc:     Chen-Yu Tsai <wens@...e.org>, Lee Jones <lee.jones@...aro.org>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-sunxi <linux-sunxi@...glegroups.com>,
        Quentin Schulz <quentin.schulz@...e-electrons.com>
Subject: Re: [linux-sunxi] [PATCH v2 6/8] ARM: dts: sun8i: a83t: Move mmc1
 pinctrl setting to dtsi file

On Fri, Oct 20, 2017 at 12:02 AM, Joonas Kylmälä <joonas.kylmala@....fi> wrote:
> Chen-Yu Tsai:
>>> Chen-Yu Tsai:
>>>> mmc1 only has 1 possible pinmux setting.
>>>
>>> What if someone is using the MMC with bus width 1 and then using the
>>> remaining 3 pins for something else?
>>
>> I would very much like to see such a design. Currently the devices
>> we see all follow Allwinner's reference design, with only minor
>> modifications. As such, mmc1 is used exclusively for connecting
>> SDIO-based WiFi modules.
>>
>> If such a radical(?) design is done, the vendor can always add
>> a "mmc1-1bit-pins" setting and override the default.
>
> Alright. So could we then make similar patches for other SoCs that have
> the same situation with the MMC pinmuxing? I.e. let's move the pinctrl
> to the dtsi file from the dts files. With H3 SDC0 and SDC1 nodes could
> be moved then to the dtsi. Can't we also move the SDC0 pinctrl in A83T
> to the dtsi file? Though, in order to do that mmc0_cd_pin node needs to
> be added to the A38T dtsi.

Yes. We are slowly doing this and other cleanups. This is somewhat
boring and tedious, and it's not exactly a high priority item. You
might have noticed Maxime recently sent patches to clean up sun4i
and sun9i.

ChenYu

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