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Message-ID: <38b34f81-3adb-98c5-c482-0d53b9155d3b@linux.intel.com>
Date: Wed, 1 Nov 2017 07:17:45 -0700
From: Dave Hansen <dave.hansen@...ux.intel.com>
To: Andy Lutomirski <luto@...nel.org>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mm@...ck.org" <linux-mm@...ck.org>,
moritz.lipp@...k.tugraz.at, daniel.gruss@...k.tugraz.at,
michael.schwarz@...k.tugraz.at,
Linus Torvalds <torvalds@...ux-foundation.org>,
Kees Cook <keescook@...gle.com>,
Hugh Dickins <hughd@...gle.com>, X86 ML <x86@...nel.org>
Subject: Re: [PATCH 21/23] x86, pcid, kaiser: allow flushing for future ASID
switches
On 11/01/2017 01:03 AM, Andy Lutomirski wrote:
>> This ensures that any futuee context switches will do a full flush
>> of the TLB so they pick up the changes.
> I'm convuced. What was wrong with the old code? I guess I just don't
> see what the problem is that is solved by this patch.
Instead of flushing *now* with INVPCID, this lets us flush *later* with
CR3. It just hijacks the code that you already have that flushes CR3
when loading a new ASID by making all ASIDs look new in the future.
We have to load CR3 anyway, so we might as well just do this flush then.
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