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Date:   Thu, 2 Nov 2017 01:12:05 -0700
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     sean.wang@...iatek.com
Cc:     mturquette@...libre.com, robh+dt@...nel.org,
        matthias.bgg@...il.com, mark.rutland@....com,
        p.zabel@...gutronix.de, devicetree@...r.kernel.org,
        linux-mediatek@...ts.infradead.org, linux-clk@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Chen Zhong <chen.zhong@...iatek.com>
Subject: Re: [PATCH v2 2/4] clk: mediatek: add the option for determining PLL
 source clock

On 10/05, sean.wang@...iatek.com wrote:
> From: Chen Zhong <chen.zhong@...iatek.com>
> 
> Since the previous setup always sets the PLL using crystal 26MHz, this
> doesn't always happen in every MediaTek platform. So the patch added
> flexibility for assigning extra member for determining the PLL source
> clock.
> 
> Signed-off-by: Chen Zhong <chen.zhong@...iatek.com>
> Signed-off-by: Sean Wang <sean.wang@...iatek.com>
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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