lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAMmz+YmhGXPQ_KydpPTLbPDQW-6G_wxrnAz2UYqSwqQJHBN_5Q@mail.gmail.com>
Date:   Sun, 12 Nov 2017 11:09:23 -0800
From:   Milind Chabbi <chabbi.milind@...il.com>
To:     Milind Chabbi <chabbi.milind@...il.com>
Cc:     Jiri Olsa <jolsa@...hat.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Namhyung Kim <namhyung@...nel.org>,
        linux-kernel@...r.kernel.org,
        Michael Kerrisk-manpages <mtk.manpages@...il.com>,
        linux-man@...r.kernel.org, Michael Ellerman <mpe@...erman.id.au>,
        Andi Kleen <ak@...ux.intel.com>,
        Kan Liang <kan.liang@...el.com>,
        Hari Bathini <hbathini@...ux.vnet.ibm.com>,
        Sukadev Bhattiprolu <sukadev@...ux.vnet.ibm.com>,
        Jin Yao <yao.jin@...ux.intel.com>
Subject: Re: [PATCH] perf/core: fast breakpoint modification via _IOC_MODIFY_BREAKPOINT

 ,

On Thu, Nov 9, 2017 at 10:59 AM, Milind Chabbi <chabbi.milind@...il.com> wrote:
> SNIP
>
> On Thu, Nov 9, 2017 at 5:12 AM, Jiri Olsa <jolsa@...hat.com> wrote:
>>
>>
>> how about something like below (untested)
>>
>> looks like there's no irq caller for modify_user_hw_breakpoint,
>> so we should be fine with locking nr_bp_mutex
>>
>> jirka
>>
>>
>> ---
>> diff --git a/kernel/events/hw_breakpoint.c b/kernel/events/hw_breakpoint.c
>> index 3f8cb1e14588..f062b68399ea 100644
>> --- a/kernel/events/hw_breakpoint.c
>> +++ b/kernel/events/hw_breakpoint.c
>> @@ -448,6 +448,8 @@ int modify_user_hw_breakpoint(struct perf_event *bp, struct perf_event_attr *att
>>         else
>>                 perf_event_disable(bp);
>>
>> +       release_bp_slot(bp);
>> +
>>         bp->attr.bp_addr = attr->bp_addr;
>>         bp->attr.bp_type = attr->bp_type;
>>         bp->attr.bp_len = attr->bp_len;
>> @@ -455,9 +457,9 @@ int modify_user_hw_breakpoint(struct perf_event *bp, struct perf_event_attr *att
>>         if (attr->disabled)
>>                 goto end;
>>
>> -       err = validate_hw_breakpoint(bp);
>> +       err = reserve_bp_slot(bp);
>>         if (!err)
>> -               perf_event_enable(bp);
>> +               err = validate_hw_breakpoint(bp);
>>
>>         if (err) {
>>                 bp->attr.bp_addr = old_addr;
>> @@ -469,6 +471,7 @@ int modify_user_hw_breakpoint(struct perf_event *bp, struct perf_event_attr *att
>>                 return err;
>>         }
>>
>> +       perf_event_enable(bp);
>>  end:
>>         bp->attr.disabled = attr->disabled;
>>
>
> We can do this accounting only if bp->attr.bp_type != attr->bp_type.
>
> -Milind


Jirka,

Neither of us seems to fully understand the convoluted logic used in
breakpoint counting.

I tested the following sequence on an x86 machine, which has four
debug registers (without your suggested patch for counting
correction).

fd1 = perf_event_open(...); //BP_TYPE= HW_BREAKPOINT_RW @ ADDR1
fd2 = perf_event_open(...); //BP_TYPE= HW_BREAKPOINT_RW @ ADDR2
fd3 = perf_event_open(...); //BP_TYPE= HW_BREAKPOINT_RW @ ADDR3
fd4 = perf_event_open(...); //BP_TYPE= HW_BREAKPOINT_RW @ ADDR4
ioctl(fd4, MODIFY, ...); // change fd4 to BP_TYPE= HW_BREAKPOINT_X @ ADDR5
close(fd4);
fd5 = perf_event_open(); //BP_TYPE=RW @ ADDR6

We expected fd5 to fail because four BP_TYPE=TYPE_DATA are in use as
per the accounting, but in reality, fd5 was successfully opened.

Is the accounting accidentally working on x86?
Is there another architecture where TYPE_DATA and TYPE_INS are counted
differently?

-Milind

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ