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Message-ID: <bfa971bb-1217-ed86-d1d8-e353ecc506aa@pengutronix.de>
Date: Wed, 15 Nov 2017 11:54:20 +0100
From: Marc Kleine-Budde <mkl@...gutronix.de>
To: Mark Brown <broonie@...nel.org>, Tim Harvey <tharvey@...eworks.com>
Cc: Jan Glauber <jan.glauber@...iumnetworks.com>,
linux-spi@...r.kernel.org,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Wolfgang Grandegger <wg@...ndegger.com>,
linux-can <linux-can@...r.kernel.org>
Subject: Re: MCP251x SPI CAN controller on Cavium ThunderX
On 11/14/2017 01:02 PM, Mark Brown wrote:
> On Mon, Nov 13, 2017 at 01:17:42PM -0800, Tim Harvey wrote:
>
>> When a register is read from the mcp251x driver the
>> octeon_spi_do_transfer() gets a spi_message with a single spi_xfer of
>> len=3, a tx_buf, and an rx_buf which I believe is supposed to shift
>> out 3 bytes out MOSI and shift in 3 bytes from MISO where the last
>> byte shifted in would be the response.
>
> No, that will simultaneously transmit and recieve three bytes.
That's what the driver supposed to do.
> If you want to transmit two bytes and then recieve one byte you need
> two xfers, one with a len of 2 and a tx_buf, the other with a len of
> 1 and a rx_buf.
To read a register (mcp251x_read_reg()) the mcp251x does a 3 byte full
duplex transfer. The first byte send is the command (read register) the
second byte the register number the third byte is a dummy. The first 2
bytes received are ignored the 3rd byte is the register contents.
Marc
--
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