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Date:   Thu, 16 Nov 2017 14:17:54 -0800
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Shawn Guo <shawn.guo@...aro.org>
Cc:     Jiancheng Xue <xuejiancheng@...ilicon.com>,
        mturquette@...libre.com, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, hermit.wangheming@...ilicon.com,
        project-aspen-dev@...aro.org
Subject: Re: [PATCH 0/3] add more clock definitions for hi3798cv200-poplar
 board

On 11/16, Shawn Guo wrote:
> Hi Stephen,
> 
> On Wed, Oct 18, 2017 at 07:00:26AM -0400, Jiancheng Xue wrote:
> > Add more clock definitions for hi3798cv200-poplar board.
> > 
> > Younian Wang (1):
> >   clk: hisilicon: correct ir clock rate for hi3798cv200 SoC
> > 
> > tianshuliang (2):
> >   clk: hisilicon: add hisi phase clock support
> >   clk: hisilicon: add emmc sample and drive clock for hi3798cv200 SoC
> 
> Since you haven't applied this series, I will update it with a few more
> patches added.  I assume it's late for 4.15 merge window anyway, so I
> intend to maintain a branch for all those Hi3798CV200 clock patches.
> After the patches are properly reviewed, I can rebase the branch to
> 4.15-rc and then ask you to pull for next merge window.  Sounds good to
> you?

Yes that's fine. I am sending the PR today/tomorrow.

-- 
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a Linux Foundation Collaborative Project

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