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Date:   Fri, 24 Nov 2017 10:37:05 +0800
From:   Jacob Chen <jacob-chen@...wrt.com>
To:     linux-rockchip@...ts.infradead.org
Cc:     linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        mchehab@...nel.org, linux-media@...r.kernel.org,
        sakari.ailus@...ux.intel.com, hans.verkuil@...co.com,
        tfiga@...omium.org, zhengsq@...k-chips.com,
        laurent.pinchart@...asonboard.com, zyc@...k-chips.com,
        eddie.cai.linux@...il.com, jeffy.chen@...k-chips.com,
        allon.huang@...k-chips.com, devicetree@...r.kernel.org,
        heiko@...ech.de, robh+dt@...nel.org,
        Jacob Chen <jacob2.chen@...k-chips.com>
Subject: [PATCH v2 10/11] arm64: dts: rockchip: add rx0 mipi-phy for rk3399

From: Shunqian Zheng <zhengsq@...k-chips.com>

It's a Designware MIPI D-PHY, used for ISP0 in rk3399.

Signed-off-by: Shunqian Zheng <zhengsq@...k-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@...k-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 66a912fab5dd..a65b110afaf3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1292,6 +1292,17 @@
 			status = "disabled";
 		};
 
+		mipi_dphy_rx0: mipi-dphy-rx0 {
+			compatible = "rockchip,rk3399-mipi-dphy";
+			clocks = <&cru SCLK_MIPIDPHY_REF>,
+				<&cru SCLK_DPHY_RX0_CFG>,
+				<&cru PCLK_VIO_GRF>;
+			clock-names = "dphy-ref", "dphy-cfg", "grf";
+			power-domains = <&power RK3399_PD_VIO>;
+			bus-width = <4>;
+			status = "disabled";
+		};
+
 		u2phy0: usb2-phy@...0 {
 			compatible = "rockchip,rk3399-usb2phy";
 			reg = <0xe450 0x10>;
-- 
2.15.0

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