linux-kernel - [PATCH v2 09/11] arm64: dts: rockchip: add isp0 node for rk3399

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20171124023706.5702-10-jacob-chen@iotwrt.com>
Date:   Fri, 24 Nov 2017 10:37:04 +0800
From:   Jacob Chen <jacob-chen@...wrt.com>
To:     linux-rockchip@...ts.infradead.org
Cc:     linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        mchehab@...nel.org, linux-media@...r.kernel.org,
        sakari.ailus@...ux.intel.com, hans.verkuil@...co.com,
        tfiga@...omium.org, zhengsq@...k-chips.com,
        laurent.pinchart@...asonboard.com, zyc@...k-chips.com,
        eddie.cai.linux@...il.com, jeffy.chen@...k-chips.com,
        allon.huang@...k-chips.com, devicetree@...r.kernel.org,
        heiko@...ech.de, robh+dt@...nel.org,
        Jacob Chen <jacob2.chen@...k-chips.com>
Subject: [PATCH v2 09/11] arm64: dts: rockchip: add isp0 node for rk3399

From: Shunqian Zheng <zhengsq@...k-chips.com>

rk3399 have two ISP, but we havn't test isp1, so just add isp0 at present.

Signed-off-by: Shunqian Zheng <zhengsq@...k-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@...k-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d340b58ab184..66a912fab5dd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1588,6 +1588,21 @@
 		status = "disabled";
 	};
 
+	isp0: isp0@...10000 {
+		compatible = "rockchip,rk3399-cif-isp";
+		reg = <0x0 0xff910000 0x0 0x4000>;
+		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru SCLK_ISP0>,
+			 <&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
+			 <&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
+		clock-names = "clk_isp",
+			      "aclk_isp", "aclk_isp_wrap",
+			      "hclk_isp", "hclk_isp_wrap";
+		power-domains = <&power RK3399_PD_ISP0>;
+		iommus = <&isp0_mmu>;
+		status = "disabled";
+	};
+
 	isp0_mmu: iommu@...14000 {
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
-- 
2.15.0