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Message-ID: <20171128193623.f4ify7yielg6fwn5@hirez.programming.kicks-ass.net>
Date:   Tue, 28 Nov 2017 20:36:23 +0100
From:   Peter Zijlstra <peterz@...radead.org>
To:     Dave Hansen <dave.hansen@...ux.intel.com>
Cc:     Andy Lutomirski <luto@...capital.net>,
        Ingo Molnar <mingo@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        "H . Peter Anvin" <hpa@...or.com>, Borislav Petkov <bp@...en8.de>,
        Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH 15/24] x86/mm: Allow flushing for future ASID switches

On Tue, Nov 28, 2017 at 08:05:05PM +0100, Peter Zijlstra wrote:
> I'm now staring at the RESTORE_CR3 stuff, and that appears to be called
> in the NMI handling where the stack is not to be used (if I read it
> right), so that's going to be a little more tricky.

As I just mentioned on IRC; I just realized that RESTORE_CR3 is always
flushing. So what I just wrote is effectively an optimization that
allows a nonflush.

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