[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CALCETrUFfpDLEP78K9V4GsbHWS5=M6k8ndv0p+R0ud0=xxbaMg@mail.gmail.com>
Date: Mon, 27 Nov 2017 21:16:19 -0800
From: Andy Lutomirski <luto@...capital.net>
To: Ingo Molnar <mingo@...nel.org>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
"H . Peter Anvin" <hpa@...or.com>,
Peter Zijlstra <peterz@...radead.org>,
Borislav Petkov <bp@...en8.de>,
Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH 15/24] x86/mm: Allow flushing for future ASID switches
On Mon, Nov 27, 2017 at 2:49 AM, Ingo Molnar <mingo@...nel.org> wrote:
> From: Dave Hansen <dave.hansen@...ux.intel.com>
>
> If changing the page tables in such a way that an invalidation of
> all contexts (aka. PCIDs / ASIDs) is required, they can be
> actively invalidated by:
>
> 1. INVPCID for each PCID (works for single pages too).
>
> 2. Load CR3 with each PCID without the NOFLUSH bit set
>
> 3. Load CR3 with the NOFLUSH bit set for each and do INVLPG for each address.
>
> But, none of these are really feasible since there are ~6 ASIDs (12 with
> KAISER) at the time that invalidation is required. Instead of
> actively invalidating them, invalidate the *current* context and
> also mark the cpu_tlbstate _quickly_ to indicate future invalidation
> to be required.
>
> At the next context-switch, look for this indicator
> ('all_other_ctxs_invalid' being set) invalidate all of the
> cpu_tlbstate.ctxs[] entries.
>
> This ensures that any future context switches will do a full flush
> of the TLB, picking up the previous changes.
NAK.
We need to split up __flush_tlb_one() into __flush_tlb_one() and
__flush_tlb_one_kernel(). We've gotten away with having a single
function for both this long because we've never had PCID on and
nonglobal kernel mappings around. So we're busted starting with
"x86/mm/kaiser: Disable global pages by default with KAISER", which
means that we have a potential corruption issue affecting anyone who
tries to bisect the series.
Then we need to make the kernel variant do something sane (presumably
just call __flush_tlb_all if we have PCID && !PGE). And, for the user
variant, we need a straightforward, clean, efficient way to mark a
given address space on a given CPU as needing a usermode PCID flush
when its usermode tables are next loaded. This patch isn't it.
--Andy
Powered by blists - more mailing lists