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Message-ID: <CALCETrUT27N6ituDmUZg5ndxwi6ZKvfDuXSR077goC221-7peA@mail.gmail.com>
Date: Mon, 27 Nov 2017 21:22:27 -0800
From: Andy Lutomirski <luto@...capital.net>
To: Ingo Molnar <mingo@...nel.org>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
"H . Peter Anvin" <hpa@...or.com>,
Peter Zijlstra <peterz@...radead.org>,
Borislav Petkov <bp@...en8.de>,
Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH 16/24] x86/mm/kaiser: Use PCID feature to make user and
kernel switches faster
On Mon, Nov 27, 2017 at 2:49 AM, Ingo Molnar <mingo@...nel.org> wrote:
> From: Dave Hansen <dave.hansen@...ux.intel.com>
>
> Short summary: Use x86 PCID feature to avoid flushing the TLB at all
> interrupts and syscalls. Speed them up. Makes context switches
> and TLB flushing slower.
I suspect that, if we actually did it right (by doing a deferred
usermode flush when we switch CR3), it wouldn't make context switches
or TLB flushing slower.
> + /*
> + * On systems with PCIDs, but no INVPCID, the only
> + * way to flush a PCID is a CR3 write. Note that
> + * we use the kernel page tables with the *user*
> + * ASID here.
> + */
> + unsigned long user_asid_flush_cr3;
> + user_asid_flush_cr3 = build_cr3(pgd, user_asid(kern_asid));
> + write_cr3(user_asid_flush_cr3);
This is wrong. If we could atomically switch CR3 and switch it back
without any speculative fills in the mean time, we might be okay, but
that's not what's happening. We could be filling the TLB with
usermode-tagged kernel entries, which is a big no-no.
(And I'm ignoring the fact that this code seems to have forgotten the
"switch back" part.)
> + /*
> + * We do not use PCIDs with KAISER unless we also
> + * have INVPCID. Getting here is unexpected.
> + */
> + WARN_ON_ONCE(1);
Well that's a bummer.
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