linux-kernel - Re: [PATCH] KVM: VMX: Cache IA32

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20171129205624.GD3070@tassilo.jf.intel.com>
Date:   Wed, 29 Nov 2017 12:56:24 -0800
From:   Andi Kleen <ak@...ux.intel.com>
To:     Jim Mattson <jmattson@...gle.com>
Cc:     Wanpeng Li <kernellwp@...il.com>,
        LKML <linux-kernel@...r.kernel.org>,
        kvm list <kvm@...r.kernel.org>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Radim Krčmář <rkrcmar@...hat.com>,
        Wanpeng Li <wanpeng.li@...mail.com>
Subject: Re: [PATCH] KVM: VMX: Cache IA32_DEBUGCTL in memory

On Wed, Nov 29, 2017 at 11:05:46AM -0800, Jim Mattson wrote:
> An alternative is to give the L1 guest read permission for this MSR in
> the MSR permission bitmaps. It's still going to be ~80 cycles, but
> that's better than the cost of a VM-exit/VM-entry round-trip.

It's a useful optimization, 80 cycles is 80 cycles.

The cache invalidation could likely be really simple, like:
have a global counter
always check the counter before and after and don't use the cache
if they don't match.
change KDB etc. to increase the counter.

-Andi