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Message-ID: <39ef8b45-f6f2-9002-259a-a6d0fa1058fc@redhat.com>
Date:   Thu, 30 Nov 2017 13:27:01 +0100
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Luwei Kang <luwei.kang@...el.com>, kvm@...r.kernel.org
Cc:     tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
        x86@...nel.org, rkrcmar@...hat.com, linux-kernel@...r.kernel.org,
        joro@...tes.org, Chao Peng <chao.p.peng@...ux.intel.com>
Subject: Re: [PATCH v3 9/9] KVM: x86: Implement Intel Processor Trace context
 switch

On 27/11/2017 21:24, Luwei Kang wrote:
> +	if (pt_mode == PT_MODE_HOST_GUEST) {
> +		u32 eax, ebx, ecx, edx;
> +
> +		cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);

Since it's used in many places, it's better if you cache CPUID[14,1].EAX.

Thanks,

Paolo

> +		memset(&vmx->pt_desc, 0, sizeof(vmx->pt_desc));
> +		vmx->pt_desc.addr_num = eax & 0x7;
> +		/* Bit[6~0] are forced to 1, writes are ignored. */
> +		vmx->pt_desc.guest.output_mask = 0x7F;
> +		vmcs_write64(GUEST_IA32_RTIT_CTL, 0);
> +	}

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