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Message-ID: <82D7661F83C1A047AF7DC287873BF1E167E4F3E1@SHSMSX101.ccr.corp.intel.com>
Date: Fri, 1 Dec 2017 06:40:19 +0000
From: "Kang, Luwei" <luwei.kang@...el.com>
To: Paolo Bonzini <pbonzini@...hat.com>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>
CC: "tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>,
"hpa@...or.com" <hpa@...or.com>, "x86@...nel.org" <x86@...nel.org>,
"rkrcmar@...hat.com" <rkrcmar@...hat.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"joro@...tes.org" <joro@...tes.org>,
Chao Peng <chao.p.peng@...ux.intel.com>
Subject: RE: [PATCH v3 7/9] KVM: x86: Implement Intel Processor Trace MSRs
read/write
> > + case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
> > + u32 eax, ebx, ecx, edx;
> > +
> > + cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
>
> Please cache the cpuid_count result, or do the cpuid_count after testing
> vmx_pt_supported() (which you can use instead of going through kvm_x86_ops).
Hi Paolo,
Thanks for your reply. I have cache EAX in "struct pt_desc" and will initialize in vmx_vcpu_setup().
+struct pt_desc {
+ unsigned int addr_num;
+ struct pt_ctx host;
+ struct pt_ctx guest;
+};
But kvm_init_msr_list() is invoked too early, I have to read from hardware. So, what about change like this.
- cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
- if (!kvm_x86_ops->pt_supported() || msrs_to_save[i] -
- MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
+ if (!kvm_x86_ops->pt_supported())
continue;
+ cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
+ if (msrs_to_save[i] -
+ MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
+ continue;
Thanks,
Luwei Kang
>
> Thanks,
>
> Paolo
>
> > + if (!kvm_x86_ops->pt_supported() || msrs_to_save[i] -
> > + MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
> > + continue;
> > + break;
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