linux-kernel - Re: [PATCH v2 0/7] ARM: Broadcom Brahma-B15 readahead cache support

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Date:   Thu, 30 Nov 2017 16:17:42 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Florian Fainelli <f.fainelli@...il.com>,
        linux-arm-kernel@...ts.infradead.org,
        Russell King <linux@...linux.org.uk>
Cc:     Brian Norris <computersforpeace@...il.com>,
        Gregory Fong <gregory.0xf0@...il.com>,
        "maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE" 
        <bcm-kernel-feedback-list@...adcom.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "David S. Miller" <davem@...emloft.net>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        "Martin K. Petersen" <martin.petersen@...cle.com>,
        Vladimir Murzin <vladimir.murzin@....com>,
        Jonathan Austin <jonathan.austin@....com>,
        Kees Cook <keescook@...omium.org>,
        Laura Abbott <labbott@...hat.com>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Mark Rutland <mark.rutland@....com>,
        Pawel Moll <pawel.moll@....com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Douglas Anderson <dianders@...omium.org>,
        Marc Zyngier <marc.zyngier@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Christoffer Dall <cdall@...aro.org>,
        Doug Anderson <armlinux@...isordat.com>,
        Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        Anna-Maria Gleixner <anna-maria@...utronix.de>,
        Ingo Molnar <mingo@...nel.org>,
        Richard Cochran <rcochran@...utronix.de>,
        open list <linux-kernel@...r.kernel.org>, opendmb@...il.com
Subject: Re: [PATCH v2 0/7] ARM: Broadcom Brahma-B15 readahead cache support

On 08/14/2017 09:23 AM, Florian Fainelli wrote:
> 
> 
> On 07/14/2017 03:11 PM, Florian Fainelli wrote:
>> On 06/23/2017 10:52 AM, Florian Fainelli wrote:
>>> Hi all,
>>>
>>> This patch series adds support for the Broadcom Brahma-B15 readahead cache.
>>> I submitted that patch series a couple of years ago, and then slept on it so
>>> here is another stab at it.
>>>
>>> Note that we did not implement this cache as a version of an outer cache
>>> for several reasons:
>>>
>>> - we initially thought we needed to intercept flush_icache_all and
>>>   flush_kern_cache_louis but upon further inspection we convinced ourselves
>>>   this is no longer needed, still, flush_cache_all() needs special handling
>>>   here and needs to be wrapped around
>>>
>>> - the outer cache does not allow differentiating a DMA transfer direction
>>>   this is a readahead cache, so it does not participate in writes, flushing
>>>   it during reads *and* writes kills the performance completely
>>>
>>> - finally, most operations that outer_cache cares about are on MVA, which
>>>   is transparent to the readahead cache here
>>>
>>> Changes in v2:
>>>
>>> - clarify that the read-ahead caches does invalidates on writes (IOW) based
>>>   on Russell's feedback
>>
>> Any comments on this? Thank you.
> 
> Should I just go a ahead and queue these changes in Russell's patch tracker?

Per IRC conversation with Russell, queued into his patch tracking system as:

http://www.armlinux.org.uk/developer/patches/viewpatch.php?id=8724/1
http://www.armlinux.org.uk/developer/patches/viewpatch.php?id=8725/1
http://www.armlinux.org.uk/developer/patches/viewpatch.php?id=8729/1
http://www.armlinux.org.uk/developer/patches/viewpatch.php?id=8726/1
http://www.armlinux.org.uk/developer/patches/viewpatch.php?id=8730/1
http://www.armlinux.org.uk/developer/patches/viewpatch.php?id=8728/1
http://www.armlinux.org.uk/developer/patches/viewpatch.php?id=8727/1
-- 
Florian