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Message-ID: <CAMuHMdWFzUbZ-wcyZmLEXcnFQ+RJBnkrxW+B0ie9cR=1LPtsgw@mail.gmail.com> Date: Tue, 5 Dec 2017 10:09:11 +0100 From: Geert Uytterhoeven <geert@...ux-m68k.org> To: Rob Herring <robh@...nel.org> Cc: Ivo Sieben <meltedpianoman@...il.com>, Arnd Bergmann <arnd@...db.de>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Mark Rutland <mark.rutland@....com>, Chris Wright <chrisw@...s-sol.org>, Wolfram Sang <wsa@...-dreams.de>, "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org> Subject: Re: [PATCH 1/3] eeprom: at25: Add DT support for EEPROMs with odd address bits Hi Rob, On Tue, Dec 5, 2017 at 9:57 AM, Geert Uytterhoeven <geert@...ux-m68k.org> wrote: > On Mon, Dec 4, 2017 at 10:17 PM, Rob Herring <robh@...nel.org> wrote: >> On Mon, Dec 04, 2017 at 10:17:47AM +0100, Geert Uytterhoeven wrote: >>> On Thu, Nov 30, 2017 at 2:29 PM, Geert Uytterhoeven >>> <geert+renesas@...der.be> wrote: >>> > Certain EEPROMS have a size that is larger than the number of address >>> > bytes would allow, and store the MSB of the address in bit 3 of the >>> > instruction byte. >>> > >>> > This can be described in platform data using EE_INSTR_BIT3_IS_ADDR, or >>> > in DT using the obsolete legacy "at25,addr-mode" property. >>> > But currently there exists no non-deprecated way to describe this in DT. >>> > >>> > Hence extend the existing "address-width" DT property to allow >>> > specifying 9, 17, or 25 address bits, and enable support for that in the >>> > driver. >>> > >>> > Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be> >>> > --- >>> > EEPROMs using 9 address bits are common (e.g. M95040, 25AA040/25LC040). >>> > Do EEPROMs using 17 or 25 address bits, as mentioned in >>> > include/linux/spi/eeprom.h, really exist? >>> > Or should we just limit it to a single odd value (9 bits)? >>> >>> At least for the real Atmel parts, only the AT25040 part uses odd (8 + >>> 1 bit) addressing. >> >> Seems like we should have a specific compatible for it. > > Possibly. But currently all configuration is done through DT properties, not > through matching on compatible values. Adding compatible values for all known/used parts could quickly become a large table. E.g. Atmel/Microchip has 3 variants of 512-byte EEPROMs: AT25040B, 25LC040A, and 25AA040A. The former uses an 8-byte pagesize, while the latter parts use 16-byte pagesizes. Not to mention "compatible" parts from other manufacturers, and all other supported size. Currently all of this is configured through the "pagesize", "size", and "address-width" DT properties, with matching on generic "atmel,at25". Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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