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Message-ID: <7ecd75fb-bd2c-53ae-a74a-2f13a6de5ec3@linaro.org>
Date: Wed, 6 Dec 2017 09:44:01 +0000
From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To: Bartosz Golaszewski <brgl@...ev.pl>,
David Lechner <david@...hnology.com>
Cc: linux-i2c <linux-i2c@...r.kernel.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] eeprom: at24: Change nvmem stride to 1
On 04/12/17 17:44, Bartosz Golaszewski wrote:
>> at24->nvmem_config.priv = at24;
>> - at24->nvmem_config.stride = 4;
>> + at24->nvmem_config.stride = 1;
>> at24->nvmem_config.word_size = 1;
>> at24->nvmem_config.size = chip.byte_len;
>>
>> --
>> 2.7.4
>>
> I can't find any documentation on what the stride config option does
> in nvmem, but looking at the code it's only used for alignment checks
> in nvmem core, so this patch should be ok. Still: I'm wondering if it
> shouldn't depend on the size of the eeprom or if we shouldn't make the
> chip you're using a special case.
>
> @David: what is the chip you're using? Is it an at24mac402 by any
> chance? Were you affected by the read problem we fixed recently[1][2]
> in at24?
>
> @Srinivas: any comments on that?
Stride is there to enforce address alignment. As long as there is no
issue on addresses aligned to 1 byte on at24 I do not see any issue with
the patch.
Thanks,
srini
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