linux-kernel - Re: [PATCH v4 0/4] add clk controller driver for Meson-AXG SoC

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Message-ID: <7hmv2vsm88.fsf@baylibre.com>
Date:   Wed, 06 Dec 2017 11:13:59 -0800
From:   Kevin Hilman <khilman@...libre.com>
To:     Yixun Lan <yixun.lan@...ogic.com>
Cc:     Neil Armstrong <narmstrong@...libre.com>,
        Jerome Brunet <jbrunet@...libre.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Carlo Caione <carlo@...one.org>,
        Qiufang Dai <qiufang.dai@...ogic.com>,
        <linux-amlogic@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-clk@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 0/4] add clk controller driver for Meson-AXG SoC

Yixun Lan <yixun.lan@...ogic.com> writes:

> Add driver for the clk controller which found in Meson AXG SoC
>
>   Note, we deliberately create a seperate source file for the Meson AXG
> series, instead of sharing code with previous GXBB/GXL - the file axg.c
> It would help us maintaining the code more easily.

In addition to the DT node-name fixup (c.f. reply on v3 series), I think
this series should also include a patch that switches the UART over to
the new clock provider (it's currently using the xtal fixed clock.)

This will also provide a simple way to validate/test the series.

Kevin