linux-kernel - Re: [PATCH v2 07/13] dt-bindings: power: reset: Document ocelot-reset binding

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Date:   Fri, 15 Dec 2017 14:23:32 -0600
From:   Rob Herring <robh@...nel.org>
To:     Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc:     Ralf Baechle <ralf@...ux-mips.org>, linux-mips@...ux-mips.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        Sebastian Reichel <sre@...nel.org>, linux-pm@...r.kernel.org
Subject: Re: [PATCH v2 07/13] dt-bindings: power: reset: Document
 ocelot-reset binding

On Fri, Dec 08, 2017 at 04:46:12PM +0100, Alexandre Belloni wrote:
> Add binding documentation for the Microsemi Ocelot reset block.
> 
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: devicetree@...r.kernel.org
> Cc: Sebastian Reichel <sre@...nel.org>
> Cc: linux-pm@...r.kernel.org
> Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
> ---
>  .../devicetree/bindings/power/reset/ocelot-reset.txt    | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
> 
> diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
> new file mode 100644
> index 000000000000..1bcf276b04cb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
> @@ -0,0 +1,17 @@
> +Microsemi Ocelot reset controller
> +
> +The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the
> +SoC MIPS core.
> +
> +Required Properties:
> + - compatible: "mscc,ocelot-chip-reset"
> +
> +Example:
> +	syscon@...70000 {
> +		compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
> +		reg = <0x71070000 0x1c>;
> +
> +		reset {
> +			compatible = "mscc,ocelot-chip-reset";

Why do you need a subnode here other than as a way to instantiate a 
driver? Can you describe the SOFT_RST register in reg property here 
(without having overlapping regions)?