linux-kernel - Re: [PATCH v2] ARM64: dts: meson-axg: add the SPICC controller

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Date:   Fri, 15 Dec 2017 15:48:55 +0100
From:   Neil Armstrong <narmstrong@...libre.com>
To:     Yixun Lan <yixun.lan@...ogic.com>,
        Kevin Hilman <khilman@...libre.com>, devicetree@...r.kernel.org
Cc:     Jerome Brunet <jbrunet@...libre.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Carlo Caione <carlo@...one.org>,
        Sunny Luo <sunny.luo@...ogic.com>,
        linux-amlogic@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] ARM64: dts: meson-axg: add the SPICC controller

On 15/12/2017 15:42, Yixun Lan wrote:
> From: Sunny Luo <sunny.luo@...ogic.com>
> 
> Add DT info for the SPICC controller which found in
> the Amlogic's Meson-AXG SoC.
> 
> Signed-off-by: Sunny Luo <sunny.luo@...ogic.com>
> Signed-off-by: Yixun Lan <yixun.lan@...ogic.com>
> 
> ---
> Changes int v2 since [1]
>  - rebase to Kevin's tree, branch v4.16/dt64
>  - this patch depend on clock & pinctrl DT patch
> 
> [1]
> http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005495.html
> ---
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 93 ++++++++++++++++++++++++++++++
>  1 file changed, 93 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index d356ce74ad89..d33721005748 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -7,6 +7,7 @@
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/axg-clkc.h>
>  
>  / {
>  	compatible = "amlogic,meson-axg";
> @@ -120,6 +121,28 @@
>  			#size-cells = <2>;
>  			ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
>  
> +			spicc0: spi@...00 {
> +				compatible = "amlogic,meson-axg-spicc";
> +				reg = <0x0 0x13000 0x0 0x3c>;
> +				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clkc CLKID_SPICC0>;
> +				clock-names = "core";
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				status = "disabled";
> +			};
> +

[...]

> +
> +				spi1_ss0_x_pins: spi1_ss0_x {
> +					mux {
> +						groups = "spi1_ss0_x";
> +						function = "spi1";
> +					};
> +				};
>  			};
>  		};
>  
> 

Reviewed-by: Neil Armstrong <narmstrong@...libre.com>