linux-kernel - Re: [RFC PATCH v2 1/3] PCI: rockchip: Add support for pcie wake irq

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20171222232043.GA158981@google.com>
Date:   Fri, 22 Dec 2017 15:20:44 -0800
From:   Brian Norris <briannorris@...omium.org>
To:     Tony Lindgren <tony@...mide.com>
Cc:     jeffy <jeffy.chen@...k-chips.com>, linux-kernel@...r.kernel.org,
        bhelgaas@...gle.com, shawn.lin@...k-chips.com,
        dianders@...omium.org, Heiko Stuebner <heiko@...ech.de>,
        linux-pci@...r.kernel.org, linux-rockchip@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org,
        "Rafael J. Wysocki" <rjw@...ysocki.net>
Subject: Re: [RFC PATCH v2 1/3] PCI: rockchip: Add support for pcie wake irq

+ Rafael to this thread

On Wed, Dec 20, 2017 at 11:19:12AM -0800, Tony Lindgren wrote:
> * Brian Norris <briannorris@...omium.org> [171219 00:50]:
> > On Wed, Aug 23, 2017 at 09:32:39AM +0800, Jeffy Chen wrote:
> > 
> > Did this problem ever get resolved? To be clear, I believe the problem
> > at hand is:
> > 
> > (a) in suspend/resume (not runtime PM; we may not even have runtime PM
> > support for most PCI devices)
> 
> It seems it should be enough to implement runtime PM in the PCI
> controller. Isn't each PCI WAKE# line is wired from each PCI device
> to the PCI controller?

No, not really. As discussed in later versions of this thread already,
the WAKE# hierarchy is orthogonal to the PCI hierarchy, and I think we
settled that it's reasonable to just consider this as a 1-per-device
thing, with each device "directly" attached to the PM controller. While
sharing could happen, that's something we decided to punt on...didn't
we?

> Then the PCI controller can figure out from which PCI device the
> WAKE# came from.

I'm not completely sure of the details, but I believe this *can* be
determined by PME. But I'm not sure it's guaranteed to be supported,
especially in cases where we already have 1:1 WAKE#. So we should be
*trying* to report this wakeirq info from the device, if possible.

> > Options I can think of:
> > (1) implement runtime PM callbacks for all PCI devices, where we clear
> > any PME status and ensure WAKE# stops asserting [1]
> 
> I don't think this is needed, it should be enough to have just
> the PCI controller implement runtime PM :)


Brian