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Message-ID: <alpine.DEB.2.20.1801051405500.1724@nanos>
Date: Fri, 5 Jan 2018 14:09:43 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Tim Chen <tim.c.chen@...ux.intel.com>
cc: Andy Lutomirski <luto@...nel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Greg KH <gregkh@...uxfoundation.org>,
Dave Hansen <dave.hansen@...el.com>,
Andrea Arcangeli <aarcange@...hat.com>,
Andi Kleen <ak@...ux.intel.com>,
Arjan Van De Ven <arjan.van.de.ven@...el.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/7] x86/feature: Detect the x86 feature to control
Speculation
On Thu, 4 Jan 2018, Tim Chen wrote:
> +#define MSR_IA32_SPEC_CTRL 0x00000048
> +#define SPEC_CTRL_FEATURE_DISABLE_IBRS (0 << 0)
> +#define SPEC_CTRL_FEATURE_ENABLE_IBRS (1 << 0)
> +
> +#define MSR_IA32_PRED_CMD 0x00000049
> +
> #define MSR_IA32_PERFCTR0 0x000000c1
> #define MSR_IA32_PERFCTR1 0x000000c2
> #define MSR_FSB_FREQ 0x000000cd
> @@ -439,6 +445,7 @@
> #define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1)
> #define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2)
> #define FEATURE_CONTROL_LMCE (1<<20)
> +#define FEATURE_SET_IBPB (1<<0)
So how is that bit related to the control bits above? This file is
structured in obvious ways ....
Thanks,
tglx
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