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Message-ID: <20180108105515.GG18649@localhost>
Date:   Mon, 8 Jan 2018 16:25:15 +0530
From:   Vinod Koul <vinod.koul@...el.com>
To:     Kedareswara rao Appana <appana.durga.rao@...inx.com>
Cc:     dan.j.williams@...el.com, michal.simek@...inx.com,
        appanad@...inx.com, lars@...afoo.de, akinobu.mita@...il.com,
        joabreu@...opsys.com, mike.looijmans@...ic.nl, kedare06@...il.com,
        dmaengine@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/4] dmaengine: xilinx_dma: properly configure the SG
 mode bit in the driver for cdma

On Wed, Jan 03, 2018 at 12:12:09PM +0530, Kedareswara rao Appana wrote:
> If the hardware is configured for Scatter Gather(SG) mode,
> and hardware is idle, in the control register SG mode bit
> must be set to a 0 then back to 1 by the software, to force
> the CDMA SG engine to use a new value written to the CURDESC_PNTR
> register, failure to do so could result errors from the dmaengine.

Applied 2-4, thanks

-- 
~Vinod

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