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Message-ID: <b2009674ce338fd1ad0aaaa55d176a9d.squirrel@twosheds.infradead.org>
Date: Mon, 8 Jan 2018 15:02:25 -0000
From: "David Woodhouse" <dwmw2@...radead.org>
To: "Tom Lendacky" <thomas.lendacky@....com>
Cc: "Thomas Gleixner" <tglx@...utronix.de>,
"Andrew Cooper" <andrew.cooper3@...rix.com>, bp@...en8.de,
dwmw@...zon.co.uk, gregkh@...ux-foundation.org, pjt@...gle.com,
mingo@...nel.org, linux-kernel@...r.kernel.org, hpa@...or.com,
tim.c.chen@...ux.intel.com, torvalds@...ux-foundation.org,
peterz@...radead.org, dave.hansen@...el.com,
linux-tip-commits@...r.kernel.org
Subject: Re: [tip:x86/pti] x86/cpu/AMD: Use LFENCE_RDTSC instead of
MFENCE_RDTSC
> Ok, I can add the read-back check before setting the feature flag(s).
>
> But... what about the case where the guest is a different family than
> hypervisor? If we're on, say, a Fam15h hypervisor but the guest is started
> as a Fam0fh guest where the MSR doesn't exist and LFENCE is supposed to be
> serialized? I'll have to do a rdmsr_safe() and only set the flag(s) if I
> can successfully read the MSR back and validate the bit.
At some point, if the hypervisor is lying to you about what the CPU is,
and you can't check empirically, you have to admit defeat :)
--
dwmw2
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