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Message-ID: <20180110120207.GE9003@sirena.org.uk>
Date: Wed, 10 Jan 2018 12:02:07 +0000
From: Mark Brown <broonie@...nel.org>
To: "Andrew F. Davis" <afd@...com>
Cc: linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] regcache: flat: Add valid bit to this cache type
On Tue, Jan 09, 2018 at 11:47:19AM -0600, Andrew F. Davis wrote:
> On 01/09/2018 10:24 AM, Mark Brown wrote:
> > That's a bit strong; we just used the supplied defaults from bss after
> > all! Feel free to contribute documentation.
> I meant it to be strong, a cache that never consults the backing storage
> and requires write-allocate or pre-warming to every single location is
> wrong, not just an odd type that requires more documentation.
The devices the cache infrastructure was originally designed for don't
have readback support in the hardware and people hardly ever error check
reads so we have the assumptions we have.
> > If you have the time and enthusiasm to do the audit that ensures that
> > this happens then go for it; we can't just go and cause regressions for
> > users who have devices that are currently working fine even if it's only
> > by chance.
> I would like to help here, what would be involved?
Look through all the devices, do something to make sure that their uses
make sense and have a list of the ones that remain explaining why
they're safe.
> A quick looks shows 42 instances of use of this cache type, of these
> only 8 do not define a readable table or have defaults for every register:
> sound/soc/sunxi/sun8i-codec.c
> sound/soc/codecs/msm8916-wcd-digital.c
> sound/soc/atmel/atmel-classd.c
> drivers/pwm/pwm-fsl-ftm.c
> drivers/mfd/sec-core.c
> drivers/media/i2c/max2175.c
> drivers/iio/health/max30100.c
> drivers/i2c/muxes/i2c-mux-ltc4306.c
> The are the only ones that should need to be looked at, and setting a
> table of all zero reg_defaults would restore the old behavior until each
> could be confirmed to be unaffected by this change.
A lot of those should probably be converted to rbtree (sec-core will
never suspend for example).
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