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Date:   Thu, 11 Jan 2018 15:51:45 +0100
From:   Christian König <ckoenig.leichtzumerken@...il.com>
To:     Bjorn Helgaas <helgaas@...nel.org>
Cc:     bhelgaas@...gle.com, linux-kernel@...r.kernel.org,
        linux-pci@...r.kernel.org, torvalds@...ux-foundation.org,
        aaro.koskinen@....fi, andy.shevchenko@...il.com,
        boris.ostrovsky@...cle.com, jgross@...e.com,
        alexander.deucher@....com, airlied@...ux.ie
Subject: Re: [PATCH 2/2] x86/PCI: limit the size of the 64bit window to 256GB
 v3

Am 11.01.2018 um 15:21 schrieb Bjorn Helgaas:
> On Thu, Jan 11, 2018 at 02:23:30PM +0100, Christian König wrote:
>> Avoid problems with BIOS implementations which don't report all used
>> resources to the OS by only allocating a 256GB window directly below the
>> hardware limit.
>>
>> For the full hardware documentation see:
>> https://support.amd.com/TechDocs/49125_15h_Models_30h-3Fh_BKDG.pdf
> If you can supply a section number, I'll add it here.  That spec is 700
> pages, so a hint would be useful.

Sorry, had to search for that as well. That is noted in section "2.4.6 
System Address Map".

Do you want to add that or should I resend the patch?

Regards,
Christian.

>
>> Fixes a silent reboot loop reported by Aaro Koskinen <aaro.koskinen@....fi> on
>> an AMD-based MSI MS-7699/760GA-P43(FX) system.
>>
>> v2: cleanup code a bit more, update comment and explain the hw limit
>> v3: improve commit message
>>
>> Link: https://lkml.kernel.org/r/20180105220412.fzpwqe4zljdawr36@darkstar.musicnaut.iki.fi
>> Reported-by: Aaro Koskinen <aaro.koskinen@....fi>
>> Signed-off-by: Christian König <christian.koenig@....com>
>> ---
>>   arch/x86/pci/fixup.c | 19 +++++++++----------
>>   1 file changed, 9 insertions(+), 10 deletions(-)
>>
>> diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
>> index a91280da2ea1..9c1c98d7e3a7 100644
>> --- a/arch/x86/pci/fixup.c
>> +++ b/arch/x86/pci/fixup.c
>> @@ -662,10 +662,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2033, quirk_no_aersid);
>>    */
>>   static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
>>   {
>> -	unsigned i;
>>   	u32 base, limit, high;
>> -	struct resource *res, *conflict;
>>   	struct pci_dev *other;
>> +	struct resource *res;
>> +	unsigned i;
>> +	int r;
>>   
>>   	if (!(pci_probe & PCI_BIG_ROOT_WINDOW))
>>   		return;
>> @@ -702,19 +703,17 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
>>   	if (!res)
>>   		return;
>>   
>> +	/* Allocate a 256GB window directly below the 0xfd00000000 hw limit */
>>   	res->name = "PCI Bus 0000:00";
>>   	res->flags = IORESOURCE_PREFETCH | IORESOURCE_MEM |
>>   		IORESOURCE_MEM_64 | IORESOURCE_WINDOW;
>> -	res->start = 0x100000000ull;
>> +	res->start = 0xbd00000000ull;
>>   	res->end = 0xfd00000000ull - 1;
>>   
>> -	/* Just grab the free area behind system memory for this */
>> -	while ((conflict = request_resource_conflict(&iomem_resource, res))) {
>> -		if (conflict->end >= res->end) {
>> -			kfree(res);
>> -			return;
>> -		}
>> -		res->start = conflict->end + 1;
>> +	r = request_resource(&iomem_resource, res);
>> +	if (r) {
>> +		kfree(res);
>> +		return;
>>   	}
>>   
>>   	dev_info(&dev->dev, "adding root bus resource %pR\n", res);
>> -- 
>> 2.11.0
>>

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