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Message-ID: <CA+55aFyOnk1rd+iC_gvXpjzsv5JtJ_YXkFMukrn2WnZUS9mVmw@mail.gmail.com>
Date: Thu, 11 Jan 2018 10:51:54 -0800
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Dave Hansen <dave.hansen@...ux.intel.com>
Cc: Josh Poimboeuf <jpoimboe@...hat.com>,
Alexei Starovoitov <alexei.starovoitov@...il.com>,
Andy Lutomirski <luto@...nel.org>, Willy Tarreau <w@....eu>,
Peter Zijlstra <peterz@...radead.org>,
LKML <linux-kernel@...r.kernel.org>, X86 ML <x86@...nel.org>,
Borislav Petkov <bp@...en8.de>,
Brian Gerst <brgerst@...il.com>,
Ingo Molnar <mingo@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
"H. Peter Anvin" <hpa@...or.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Kees Cook <keescook@...omium.org>
Subject: Re: [RFC PATCH v2 6/6] x86/entry/pti: don't switch PGD on when
pti_disable is set
On Thu, Jan 11, 2018 at 10:38 AM, Dave Hansen
<dave.hansen@...ux.intel.com> wrote:
> On 01/11/2018 10:32 AM, Josh Poimboeuf wrote:
>>> hmm. Exposing cr3 to user space will make it trivial for user process
>>> to know whether kpti is active. Not sure how exploitable such
>>> information leak.
>> It's already trivial to detect PTI from user space.
>
> Do tell.
One way to do it is to just run the attack, and see if you get something.
So it's not really "is PTI enabled", but a "is meltdown there". Then
you just use that together with cpuinfo to decide if PTI is enabled.
So I think Josh is 100% right. Detecting PTI on/off is not hard.
But that does *not* mean that %cr3 isn't secret. %cr3 should
definitely never *ever* be accessible to user space.
Linus
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