linux-kernel - Re: [PATCH 5/5] x86/feature: Detect the x86 feature Indirect Branch Prediction Barrier

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Date:   Fri, 12 Jan 2018 15:36:17 +0000
From:   "Woodhouse, David" <dwmw@...zon.co.uk>
To:     Tom Lendacky <thomas.lendacky@....com>,
        Ashok Raj <ashok.raj@...el.com>,
        <linux-kernel@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        "Tim Chen" <tim.c.chen@...ux.intel.com>,
        Andy Lutomirski <luto@...nel.org>,
        "Linus Torvalds" <torvalds@...ux-foundation.org>,
        Greg KH <gregkh@...uxfoundation.org>
CC:     Dave Hansen <dave.hansen@...el.com>,
        Andrea Arcangeli <aarcange@...hat.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Arjan Van De Ven <arjan.van.de.ven@...el.com>,
        Peter Zijlstra <peterz@...radead.org>,
        "Dan Williams" <dan.j.williams@...el.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Jun Nakajima <jun.nakajima@...el.com>,
        Asit Mallick <asit.k.mallick@...el.com>
Subject: Re: [PATCH 5/5] x86/feature: Detect the x86 feature Indirect
 Branch Prediction Barrier

On Fri, 2018-01-12 at 09:31 -0600, Tom Lendacky wrote:
> 
> AMD will follow the specification that if cpuid ax=0x7, return rdx[26]
> is set, it will indicate both MSR registers and features are supported.
> 
> But AMD also has a separate bit for IBPB (X86_FEATURE_PRED_CMD) alone.
> As all of the IBRS/IBPB stuff happens, that patch will follow.

Please let's roll it into the patch set. I don't want Intel posting
deliberately AMD-ignoring patches. Sort it out, guys.
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