linux-kernel - Re: [PATCH v4 8/8] EDAC: armada

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Date:   Fri, 12 Jan 2018 19:47:48 +0100
From:   Borislav Petkov <bp@...en8.de>
To:     Chris Packham <chris.packham@...iedtelesis.co.nz>
Cc:     linux@...linux.org.uk, jlu@...gutronix.de,
        thomas.petazzoni@...e-electrons.com, kernel@...gutronix.de,
        gregory.clement@...e-electrons.com,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 8/8] EDAC: armada_xp: Add support for more SoCs

On Fri, Jan 12, 2018 at 02:27:55PM +1300, Chris Packham wrote:
> The Armada 38x and other integrated SoCs use a reduced pin count so the
> width of the SDRAM interface is smaller than the Armada XP SoCs. This
> means that the definition of "full" and "half" width is reduced from
> 64/32 to 32/16.
> 
> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
> ---
>  drivers/edac/armada_xp_edac.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/edac/armada_xp_edac.c b/drivers/edac/armada_xp_edac.c
> index 70cff01afc8d..03a18b54467a 100644
> --- a/drivers/edac/armada_xp_edac.c
> +++ b/drivers/edac/armada_xp_edac.c
> @@ -341,6 +341,11 @@ static int axp_mc_probe(struct platform_device *pdev)
>  
>  	axp_mc_read_config(mci);
>  
> +	/* These SoCs have a reduced width bus */
> +	if (of_machine_is_compatible("marvell,armada380") ||
> +	    of_machine_is_compatible("marvell,armadaxp-98dx3236"))
> +		drvdata->width /= 2;
> +
>  	/* configure SBE threshold */
>  	/* it seems that SBEs are not captured otherwise */
>  	writel(1 << SDRAM_ERR_CTRL_THR_OFFSET, drvdata->base + SDRAM_ERR_CTRL_REG);
> -- 

Reviewed-by: Borislav Petkov <bp@...e.de>

-- 
Regards/Gruss,
    Boris.

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