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Message-ID: <20180115171554.35c4zhwiry4a7auq@treble>
Date: Mon, 15 Jan 2018 11:15:54 -0600
From: Josh Poimboeuf <jpoimboe@...hat.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: David Woodhouse <dwmw2@...radead.org>,
linux-kernel@...r.kernel.org, Dave Hansen <dave.hansen@...el.com>,
Ashok Raj <ashok.raj@...el.com>,
Thomas Gleixner <tglx@...utronix.de>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Greg KH <gregkh@...uxfoundation.org>,
Andrea Arcangeli <aarcange@...hat.com>,
Andi Kleen <ak@...ux.intel.com>,
Arjan Van De Ven <arjan.van.de.ven@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Jun Nakajima <jun.nakajima@...el.com>,
Asit Mallick <asit.k.mallick@...el.com>,
Borislav Petkov <bp@...en8.de>
Subject: Re: [PATCH 4/4] x86: Reindent _static_cpu_has
On Mon, Jan 15, 2018 at 05:44:32PM +0100, Peter Zijlstra wrote:
> Because its daft..
>
> Cc: Josh Poimboeuf <jpoimboe@...hat.com>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Borislav Petkov <bp@...en8.de>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> ---
> arch/x86/include/asm/cpufeature.h | 78 +++++++++++++++++++-------------------
> 1 file changed, 39 insertions(+), 39 deletions(-)
>
> --- a/arch/x86/include/asm/cpufeature.h
> +++ b/arch/x86/include/asm/cpufeature.h
> @@ -145,45 +145,45 @@ extern void clear_cpu_cap(struct cpuinfo
> */
> static __always_inline __pure bool _static_cpu_has(u16 bit)
> {
> - asm_volatile_goto("1: jmp 6f\n"
> - "2:\n"
> - ".skip -(((5f-4f) - (2b-1b)) > 0) * "
> - "((5f-4f) - (2b-1b)),0x90\n"
> - "3:\n"
> - ".section .altinstructions,\"a\"\n"
> - " .long 1b - .\n" /* src offset */
> - " .long 4f - .\n" /* repl offset */
> - " .word %P1\n" /* always replace */
> - " .byte 3b - 1b\n" /* src len */
> - " .byte 5f - 4f\n" /* repl len */
> - " .byte 3b - 2b\n" /* pad len */
> - ".previous\n"
> - ".section .altinstr_replacement,\"ax\"\n"
> - "4: jmp %l[t_no]\n"
> - "5:\n"
> - ".previous\n"
> - ".section .altinstructions,\"a\"\n"
> - " .long 1b - .\n" /* src offset */
> - " .long 0\n" /* no replacement */
> - " .word %P0\n" /* feature bit */
> - " .byte 3b - 1b\n" /* src len */
> - " .byte 0\n" /* repl len */
> - " .byte 0\n" /* pad len */
> - ".previous\n"
> - ".section .altinstr_aux,\"ax\"\n"
> - "6:\n"
> - " testb %[bitnum],%[cap_byte]\n"
> - " jnz %l[t_yes]\n"
> - " jmp %l[t_no]\n"
> - ".previous\n"
> - : : "i" (bit), "i" (X86_FEATURE_ALWAYS),
> - [bitnum] "i" (1 << (bit & 7)),
> - [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
> - : : t_yes, t_no);
> - t_yes:
> - return true;
> - t_no:
> - return false;
> + asm_volatile_goto("1: jmp 6f\n"
> + "2:\n"
> + ".skip -(((5f-4f) - (2b-1b)) > 0) * "
> + "((5f-4f) - (2b-1b)),0x90\n"
> + "3:\n"
> + ".section .altinstructions,\"a\"\n"
> + " .long 1b - .\n" /* src offset */
> + " .long 4f - .\n" /* repl offset */
> + " .word %P1\n" /* always replace */
> + " .byte 3b - 1b\n" /* src len */
> + " .byte 5f - 4f\n" /* repl len */
> + " .byte 3b - 2b\n" /* pad len */
> + ".previous\n"
> + ".section .altinstr_replacement,\"ax\"\n"
> + "4: jmp %l[t_no]\n"
> + "5:\n"
> + ".previous\n"
> + ".section .altinstructions,\"a\"\n"
> + " .long 1b - .\n" /* src offset */
> + " .long 0\n" /* no replacement */
> + " .word %P0\n" /* feature bit */
> + " .byte 3b - 1b\n" /* src len */
> + " .byte 0\n" /* repl len */
> + " .byte 0\n" /* pad len */
> + ".previous\n"
> + ".section .altinstr_aux,\"ax\"\n"
> + "6:\n"
> + " testb %[bitnum],%[cap_byte]\n"
> + " jnz %l[t_yes]\n"
> + " jmp %l[t_no]\n"
> + ".previous\n"
> + : : "i" (bit), "i" (X86_FEATURE_ALWAYS),
> + [bitnum] "i" (1 << (bit & 7)),
> + [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
> + : : t_yes, t_no);
> +t_yes:
> + return true;
> +t_no:
> + return false;
While you're at it, might as well convert the feature bit constraints to
have names like %P[name] instead of %P0 and %P1?
--
Josh
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