linux-kernel - Re: [PATCH 23/35] x86/speculation: Add basic speculation control code

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <73a5735a-6a5b-0e0f-1f0b-e7cd955880d2@intel.com>
Date:   Thu, 18 Jan 2018 09:08:02 -0800
From:   Dave Hansen <dave.hansen@...el.com>
To:     Josh Poimboeuf <jpoimboe@...hat.com>,
        Peter Zijlstra <peterz@...radead.org>
Cc:     David Woodhouse <dwmw2@...radead.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-kernel@...r.kernel.org, Ashok Raj <ashok.raj@...el.com>,
        Tim Chen <tim.c.chen@...ux.intel.com>,
        Andy Lutomirski <luto@...nel.org>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Greg KH <gregkh@...uxfoundation.org>,
        Andrea Arcangeli <aarcange@...hat.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Arjan Van De Ven <arjan.van.de.ven@...el.com>,
        Dan Williams <dan.j.williams@...el.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Jun Nakajima <jun.nakajima@...el.com>,
        Asit Mallick <asit.k.mallick@...el.com>,
        Jason Baron <jbaron@...mai.com>
Subject: Re: [PATCH 23/35] x86/speculation: Add basic speculation control code

On 01/18/2018 08:37 AM, Josh Poimboeuf wrote:
>>
>> --- a/Documentation/admin-guide/kernel-parameters.txt
>> +++ b/Documentation/admin-guide/kernel-parameters.txt
>> @@ -3932,6 +3932,7 @@
>>  			retpoline	  - replace indirect branches
>>  			retpoline,generic - google's original retpoline
>>  			retpoline,amd     - AMD-specific minimal thunk
>> +			ibrs		  - Intel: Indirect Branch Restricted Speculation
> Are there plans to add spectre_v2=ibrs_always to prevent SMT-based
> attacks?

What does "ibrs_always" mean to you?

There is a second bit in the MSR (STIBP) that is intended to keep
hyperthreads from influencing each-other.  That is behavior is implicit
when IBRS is enabled.

I think ibrs_always *should* probably be kept to refer to the future
CPUs that can safely leave IBRS enabled all the time.